| Message ID | 20180814124254.5229-5-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Some pieces of support for 32-bit Hyp mode | expand |
On Tue, Aug 14, 2018 at 01:42:48PM +0100, Peter Maydell wrote: > Implement the AArch32 HVBAR register; we can do this just by > making the existing VBAR_EL2 regdefs be STATE_BOTH. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/arm/helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 14fd78f587a..b6412fe9d1f 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -3750,7 +3750,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { > > /* Used to describe the behaviour of EL2 regs when EL2 does not exist. */ > static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { > - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, > + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, > .access = PL2_RW, > .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, > @@ -3899,7 +3899,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { > .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0, > .access = PL2_RW, > .fieldoffset = offsetof(CPUARMState, banked_spsr[BANK_HYP]) }, > - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, > + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, > .access = PL2_RW, .writefn = vbar_write, > .fieldoffset = offsetof(CPUARMState, cp15.vbar_el[2]), > -- > 2.18.0 >
On 8/14/18 2:42 PM, Peter Maydell wrote: > Implement the AArch32 HVBAR register; we can do this just by > making the existing VBAR_EL2 regdefs be STATE_BOTH. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-By: Luc Michel <luc.michel@greensocs.com> > --- > target/arm/helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 14fd78f587a..b6412fe9d1f 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -3750,7 +3750,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { > > /* Used to describe the behaviour of EL2 regs when EL2 does not exist. */ > static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { > - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, > + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, > .access = PL2_RW, > .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, > @@ -3899,7 +3899,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { > .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0, > .access = PL2_RW, > .fieldoffset = offsetof(CPUARMState, banked_spsr[BANK_HYP]) }, > - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, > + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, > .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, > .access = PL2_RW, .writefn = vbar_write, > .fieldoffset = offsetof(CPUARMState, cp15.vbar_el[2]), >
diff --git a/target/arm/helper.c b/target/arm/helper.c index 14fd78f587a..b6412fe9d1f 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3750,7 +3750,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { /* Used to describe the behaviour of EL2 regs when EL2 does not exist. */ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, .access = PL2_RW, .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, @@ -3899,7 +3899,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0, .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, banked_spsr[BANK_HYP]) }, - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64, + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0, .access = PL2_RW, .writefn = vbar_write, .fieldoffset = offsetof(CPUARMState, cp15.vbar_el[2]),
Implement the AArch32 HVBAR register; we can do this just by making the existing VBAR_EL2 regdefs be STATE_BOTH. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.18.0