[v2,5/7] mmc: renesas_sdhi: merge clk_{start,stop} functions to set_clock

Message ID 1534403799-10594-6-git-send-email-yamada.masahiro@socionext.com
State New
Headers show
Series
  • mmc: tmio: refactor TMIO core a bit and add UniPhier SD/eMMC controller support
Related show

Commit Message

Masahiro Yamada Aug. 16, 2018, 7:16 a.m.
renesas_sdhi_clk_start() and renesas_sdhi_clk_stop() are now only
called from renesas_sdhi_set_clock().  Merge them.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

---

Changes in v2: None

 drivers/mmc/host/renesas_sdhi_core.c | 39 +++++++++++-------------------------
 1 file changed, 12 insertions(+), 27 deletions(-)

-- 
2.7.4

Comments

Wolfram Sang Aug. 20, 2018, 7:13 p.m. | #1
On Thu, Aug 16, 2018 at 04:16:37PM +0900, Masahiro Yamada wrote:
> renesas_sdhi_clk_start() and renesas_sdhi_clk_stop() are now only

> called from renesas_sdhi_set_clock().  Merge them.


I can see the benefit of this change...

>  static void renesas_sdhi_set_clock(struct tmio_mmc_host *host,

>  				   unsigned int new_clock)

>  {

>  	u32 clk = 0, clock;

>  

> -	if (new_clock == 0) {

> -		renesas_sdhi_clk_stop(host);

> -		return;

> -	}

> +	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &

> +		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));

> +

> +	if (new_clock == 0)

> +		goto out;


... yet there is a slight change in that we disable the clock a tad
earlier now. I need to check the datasheets tomorrow what is exactly
documented and report back.

Patch

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 1f4c82e..a15fb2e 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -155,35 +155,16 @@  static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
 	return ret == 0 ? best_freq : clk_get_rate(priv->clk);
 }
 
-static void renesas_sdhi_clk_start(struct tmio_mmc_host *host)
-{
-	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
-		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-
-	/* HW engineers overrode docs: no sleep needed on R-Car2+ */
-	if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
-		usleep_range(10000, 11000);
-}
-
-static void renesas_sdhi_clk_stop(struct tmio_mmc_host *host)
-{
-	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
-		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
-
-	/* HW engineers overrode docs: no sleep needed on R-Car2+ */
-	if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
-		usleep_range(10000, 11000);
-}
-
 static void renesas_sdhi_set_clock(struct tmio_mmc_host *host,
 				   unsigned int new_clock)
 {
 	u32 clk = 0, clock;
 
-	if (new_clock == 0) {
-		renesas_sdhi_clk_stop(host);
-		return;
-	}
+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
+		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
+
+	if (new_clock == 0)
+		goto out;
 
 	clock = renesas_sdhi_clk_update(host, new_clock) / 512;
 
@@ -194,13 +175,17 @@  static void renesas_sdhi_set_clock(struct tmio_mmc_host *host,
 	if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
 		clk |= 0xff;
 
-	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
-			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
 	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
 	if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
 		usleep_range(10000, 11000);
 
-	renesas_sdhi_clk_start(host);
+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
+		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
+
+out:
+	/* HW engineers overrode docs: no sleep needed on R-Car2+ */
+	if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
+		usleep_range(10000, 11000);
 }
 
 static void renesas_sdhi_clk_disable(struct tmio_mmc_host *host)