[edk2,edk2-platforms,v3,15/36] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06

Message ID 20180816121239.44129-16-ming.huang@linaro.org
State New
Headers show
Series
  • Upload for D06 platform
Related show

Commit Message

Ming Huang Aug. 16, 2018, 12:12 p.m.
I2C may enable failed in D06, so retry I2C enable while
enable failed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <ming.huang@linaro.org>

---
 Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

-- 
2.17.0

_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

Patch

diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
index 9174e50dd4..d67ddc7f9b 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c
@@ -86,6 +86,7 @@  I2C_Enable (
 {
   I2C0_ENABLE_U           I2cEnableReg;
   I2C0_ENABLE_STATUS_U    I2cEnableStatusReg;
+  UINT32                  TimeCnt = I2C_READ_TIMEOUT;
 
   UINTN Base = GetI2cBase (Socket, Port);
 
@@ -93,13 +94,18 @@  I2C_Enable (
   I2cEnableReg.bits.enable = 1;
   I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32);
 
+  do {
+    // This is a empirical value for I2C delay. MemoryFance is no need here.
+    I2C_Delay (10000);
 
-  I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
-  if (I2cEnableStatusReg.bits.ic_en == 1) {
-    return EFI_SUCCESS;
-  } else {
-    return EFI_DEVICE_ERROR;
-  }
+    TimeCnt--;
+    I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32);
+    if (TimeCnt == 0) {
+      return EFI_DEVICE_ERROR;
+    }
+  } while (I2cEnableStatusReg.bits.ic_en == 0);
+
+  return EFI_SUCCESS;
 }
 
 VOID