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[198.145.21.10]) by mx.google.com with ESMTPS id z68-v6si26930961pfz.163.2018.08.16.05.14.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Aug 2018 05:14:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=XGgzms0+; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 90BC3210F3771; Thu, 16 Aug 2018 05:13:57 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::544; helo=mail-pg1-x544.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 68C82210F376C for ; Thu, 16 Aug 2018 05:13:56 -0700 (PDT) Received: by mail-pg1-x544.google.com with SMTP id f1-v6so1973216pgq.12 for ; Thu, 16 Aug 2018 05:13:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ne7UD5d46U3RJ9EVF2uqubhT3FmUwsR/vgU37WDXFUM=; b=XGgzms0+UxNFXbZq9UfybgG3d99Fi72E7ak1b16IZjHRYFpCyyaBLBJU2YHhSW7VPL ME3Ev6+vkaUV+1MWEQIRqX+pSY0fSuQKaVBu0SwUFuMG2jOYOl6S4PiKQ4nlKXMd3Yog zoH+h6IgDfVTb5jYgJxX6pID9eLCz912j8BdM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ne7UD5d46U3RJ9EVF2uqubhT3FmUwsR/vgU37WDXFUM=; b=V3IgesZ31luHzebpkvQuD+OU9QMD2kHuJcgYdIjTD48z0TeW5aArJr1jXDGjklC2c8 RS37NHmpPhl0BYfZw96NQbZA861LcLLje9l8SZB30ObfQf6q3zM2p60POziavz6kEaLI eqRCjIOxNjP9yozyG0ENR8EjWX+8MHzVHwLzFXAy7/akpv9pZnjdJSj3mjQMpOtuDdkq FFCmoSwuiCVadesdN7XNWHE6ZDRt3m/paa/rHBl8hKdHYaVIgo8Od+NlCVdd3pm2C32y B/btGERFh39dP60o0tJQWzeg2oUFFD7BWpngnHnW5zDs9QCvRFysTx5rGc86CgfeSY2f jq9w== X-Gm-Message-State: AOUpUlFBZDbqrl585rzwAelBUhods5PVCzPFcbKoqdzi7K3DVulAXIIi 0AuuY6BNI1PmF3ClRQBcEkzG9A== X-Received: by 2002:a62:225d:: with SMTP id i90-v6mr31546553pfi.246.1534421636140; Thu, 16 Aug 2018 05:13:56 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j27-v6sm46736311pfj.91.2018.08.16.05.13.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 16 Aug 2018 05:13:55 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 16 Aug 2018 20:12:18 +0800 Message-Id: <20180816121239.44129-16-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180816121239.44129-1-ming.huang@linaro.org> References: <20180816121239.44129-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v3 15/36] Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" I2C may enable failed in D06, so retry I2C enable while enable failed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c index 9174e50dd4..d67ddc7f9b 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c @@ -86,6 +86,7 @@ I2C_Enable ( { I2C0_ENABLE_U I2cEnableReg; I2C0_ENABLE_STATUS_U I2cEnableStatusReg; + UINT32 TimeCnt = I2C_READ_TIMEOUT; UINTN Base = GetI2cBase (Socket, Port); @@ -93,13 +94,18 @@ I2C_Enable ( I2cEnableReg.bits.enable = 1; I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); + do { + // This is a empirical value for I2C delay. MemoryFance is no need here. + I2C_Delay (10000); - I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); - if (I2cEnableStatusReg.bits.ic_en == 1) { - return EFI_SUCCESS; - } else { - return EFI_DEVICE_ERROR; - } + TimeCnt--; + I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); + if (TimeCnt == 0) { + return EFI_DEVICE_ERROR; + } + } while (I2cEnableStatusReg.bits.ic_en == 0); + + return EFI_SUCCESS; } VOID