From patchwork Wed Aug 22 20:41:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 144852 Delivered-To: patch@linaro.org Received: by 2002:a2e:164a:0:0:0:0:0 with SMTP id 10-v6csp401483ljw; Wed, 22 Aug 2018 13:41:25 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxaqN/ak9DJDE5yRWJMjw+OPP+XD/udPqJn41hzuAkR5UIXx+XDV7VBKIcG80oToVAKuwXI X-Received: by 2002:a17:902:c6b:: with SMTP id 98-v6mr55451307pls.233.1534970485572; Wed, 22 Aug 2018 13:41:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534970485; cv=none; d=google.com; s=arc-20160816; b=CWkh79ufy0W+NU92TeoMxhjDGhec2wDuxWC/tiyfX3hEUNf4WhretezylxBLYZHaWS 96v7t4Ri9t9UP5wJJNo9ZS2n5sH+nBTqvPQvf8Jviobt01qrodAmrkkgdthYnidbOHKu tTO7eZqxdXTXBWoLfp8UC2XGVwFnocOUM4ypEPIdqSlUDN5KiDWdDITOJcaePgqWPPn9 /o2bMvzwWpK1rA/jW/l8zjZcj4yEbsFGF619ckwlVkR6xIwFtde/GTx8Wer9sb40yX7P 5gVbD/wEQkz2WQq6Ro+EPoKK9U0DpHQh72Xd0eGBLCgpup3TLmk5/dfk9p852a+n06VL TwmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=LFNwoKHWnAWrIGSswOfaA83EB0WZUvIJWxI4582V7zU=; b=RA/VPObaMpYoTKR+sBdjhiwlDt+77p6WmLlj0/WwPMm5XEKyroQ+W2OsIUUBoWQuko 3PZPU6H3oc0l/g8X4hWfZPTCSLpNnyXq+T0ao+XaXHuNB1kh0x+InAcFQ6I8R2z74ilq CBad/KdNTgVIeu6T21QTynFrQcFXEee/lluwDv7VBjziU6zB3+fWP8+Yfq6+/+ikqKSH Hk/qk/2iKVpMSPImsIfcsnhvCoPuP5OJS4/9Kc7md/h6AdSVdGQrbPAPWRXNmgFlex/V 2ThihrvTNmd7oQJBGhabALkEriPBlNdG0pvZJgNwDIy4p3QZNrU/mzMPtqPt+JegvYlB P33Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GVvhlFEz; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t23-v6si2559068pgi.301.2018.08.22.13.41.25; Wed, 22 Aug 2018 13:41:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GVvhlFEz; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727346AbeHWAHs (ORCPT + 5 others); Wed, 22 Aug 2018 20:07:48 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:37712 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727285AbeHWAHs (ORCPT ); Wed, 22 Aug 2018 20:07:48 -0400 Received: by mail-lj1-f195.google.com with SMTP id v9-v6so2447614ljk.4 for ; Wed, 22 Aug 2018 13:41:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LFNwoKHWnAWrIGSswOfaA83EB0WZUvIJWxI4582V7zU=; b=GVvhlFEzCrNJjg99FnARE8VpwbpgDTLBIMayWMkU+aouBmuZTxxtDAmy7Wn4PX/Tu4 QUmWW6sSI89K0qoZlj1yYqzQgRFMo+2k2tOV35Ym44Bw8KDicm8Avfs+iQrES9ZQg/uO lKp2UiXOgp4vMW0dmdgie+elOAwvkVhjWiHm8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LFNwoKHWnAWrIGSswOfaA83EB0WZUvIJWxI4582V7zU=; b=uVaM/HjX1DJwuyqVu/rjJUwbLScZzKYEKIJtVkzDPGCDP5eSrm+qoer+qSkuzLkN8h Pdj9CJx7KvHEOxIFoyoPoxCTDRS6FVsj3YRX3tvjl7UlNeIXP1ROxQ9S64jkY9J99atx r0t5JQ3/O8W2FcCbKpaPgJpn8KwDZ/OJ0Izl61wl5eNIxrgzAeaa/ZB/cfjQVSPbt1Dj iuNFf4jYto4dVL/RuZoF9No6Zm45nyovLocOcJjjB/zNrBcTSoJVMCgXga81L2qZBuWm CIo8nf1zhHq8dCSZ6o9aQBCp9yZKU2KyIZ1vN2DV1dKmK1K90l7FbR3aCEbpKeoNxv7t RMGQ== X-Gm-Message-State: AOUpUlHdfKb6lIBf8+bqHqYriZvl00bt7WUPS2TL4T6Ew2Tmk+Sxidio Z2Tew0Qd2hLpR7clk7Js/2MhYA== X-Received: by 2002:a2e:8346:: with SMTP id l6-v6mr26109614ljh.72.1534970481505; Wed, 22 Aug 2018 13:41:21 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id q128-v6sm431515ljq.72.2018.08.22.13.41.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 22 Aug 2018 13:41:20 -0700 (PDT) From: Linus Walleij To: H Hartley Sweeten , Alexander Sverdlin Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, Arnd Bergmann , arm@kernel.org, Linus Walleij Subject: [PATCH 01/11] ARM/gpio: ep93xx: build standalone Date: Wed, 22 Aug 2018 22:41:01 +0200 Message-Id: <20180822204111.9581-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180822204111.9581-1-linus.walleij@linaro.org> References: <20180822204111.9581-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Arnd Bergmann As a preparation for multiplatform support, this ensures that the ep93xx gpio driver can be built without any of the platform specific header files. We pass the IRQ numbers as a resource now, and use the virtual mmio base from the already existing resource, rather than relying on the hardwired virtual address from the header file. Some numbers are now hardcoded that came from macros in the past, but for all I can tell, the driver already relied on the specific values. Cc: arm@kernel.org Signed-off-by: Arnd Bergmann Signed-off-by: Linus Walleij --- Arnd/other ARM SoC person: Please provide an ACK for this patch so I can merge it with the rest of the refactorings into the GPIO tree. --- arch/arm/mach-ep93xx/core.c | 9 +++++++ drivers/gpio/gpio-ep93xx.c | 48 ++++++++++++++++++------------------- 2 files changed, 32 insertions(+), 25 deletions(-) -- 2.17.1 Acked-by: Arnd Bergmann Acked-by: Olof Johansson diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 574dfdc527ed..b82b632789f7 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -141,6 +141,15 @@ EXPORT_SYMBOL_GPL(ep93xx_chip_revision); *************************************************************************/ static struct resource ep93xx_gpio_resource[] = { DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX), + DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX), }; static struct platform_device ep93xx_gpio_device = { diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c index 45d384039e9b..654525d6a9f1 100644 --- a/drivers/gpio/gpio-ep93xx.c +++ b/drivers/gpio/gpio-ep93xx.c @@ -22,11 +22,20 @@ /* FIXME: this is here for gpio_to_irq() - get rid of this! */ #include -#include -#include - #define irq_to_gpio(irq) ((irq) - gpio_to_irq(0)) +void __iomem *ep93xx_gpio_base; /* FIXME: put this into irq_data */ +#define EP93XX_GPIO_REG(x) (ep93xx_gpio_base + (x)) +#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) +#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) +#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) + +/* Maximum value for gpio line identifiers */ +#define EP93XX_GPIO_LINE_MAX 63 + +/* Maximum value for irq capable line identifiers */ +#define EP93XX_GPIO_LINE_MAX_IRQ 23 + struct ep93xx_gpio { void __iomem *mmio_base; struct gpio_chip gc[8]; @@ -87,7 +96,7 @@ static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc) status = readb(EP93XX_GPIO_A_INT_STATUS); for (i = 0; i < 8; i++) { if (status & (1 << i)) { - int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; + int gpio_irq = gpio_to_irq(0) + i; generic_handle_irq(gpio_irq); } } @@ -95,7 +104,7 @@ static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc) status = readb(EP93XX_GPIO_B_INT_STATUS); for (i = 0; i < 8; i++) { if (status & (1 << i)) { - int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; + int gpio_irq = gpio_to_irq(8) + i; generic_handle_irq(gpio_irq); } } @@ -110,7 +119,7 @@ static void ep93xx_gpio_f_irq_handler(struct irq_desc *desc) */ unsigned int irq = irq_desc_get_irq(desc); int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ - int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; + int gpio_irq = gpio_to_irq(16) + port_f_idx; generic_handle_irq(gpio_irq); } @@ -228,9 +237,10 @@ static struct irq_chip ep93xx_gpio_irq_chip = { .irq_set_type = ep93xx_gpio_irq_type, }; -static void ep93xx_gpio_init_irq(void) +static void ep93xx_gpio_init_irq(struct platform_device *pdev) { int gpio_irq; + int i; for (gpio_irq = gpio_to_irq(0); gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { @@ -239,24 +249,11 @@ static void ep93xx_gpio_init_irq(void) irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST); } - irq_set_chained_handler(IRQ_EP93XX_GPIO_AB, + irq_set_chained_handler(platform_get_irq(pdev, 0), ep93xx_gpio_ab_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX, - ep93xx_gpio_f_irq_handler); + for (i = 1; i <= 8; i++) + irq_set_chained_handler(platform_get_irq(pdev, i), + ep93xx_gpio_f_irq_handler); } @@ -362,6 +359,7 @@ static int ep93xx_gpio_probe(struct platform_device *pdev) ep93xx_gpio->mmio_base = devm_ioremap_resource(dev, res); if (IS_ERR(ep93xx_gpio->mmio_base)) return PTR_ERR(ep93xx_gpio->mmio_base); + ep93xx_gpio_base = ep93xx_gpio->mmio_base; for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) { struct gpio_chip *gc = &ep93xx_gpio->gc[i]; @@ -373,7 +371,7 @@ static int ep93xx_gpio_probe(struct platform_device *pdev) bank->label); } - ep93xx_gpio_init_irq(); + ep93xx_gpio_init_irq(pdev); return 0; }