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[198.145.21.10]) by mx.google.com with ESMTPS id t9-v6si3844050pga.26.2018.08.23.09.09.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Aug 2018 09:09:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=BLTJ1b+u; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A020B21103DC8; Thu, 23 Aug 2018 09:09:09 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 21E4F21103DB9 for ; Thu, 23 Aug 2018 09:09:08 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id p12-v6so2990227pfh.2 for ; Thu, 23 Aug 2018 09:09:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cDB8gMQSTExgvZaL9eeXR0muK+PhuF99UbZIr4DowyE=; b=BLTJ1b+u1657F8w18271BzAI8HmXZsNR7GhDN3OXWpwUf/sUJ6C1YheMGuMDZ3+0O8 ksMdY/ZEZ2QvmYfowKdL++7sJxVe7PXVaXI6ErAuepBelfHWyKJ+W6QN67/N47TLAObQ lDBb/LsLtO0qlhbG2rNE3D0Vu2YuROblFUYmA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cDB8gMQSTExgvZaL9eeXR0muK+PhuF99UbZIr4DowyE=; b=lvXP0Tdql/OT9lZN5V+1m+heEnoFetmZ2gMoiEtFlcyMQSZR+Vd++f7qCOmda2oMN2 YFKlvlTfCy8drzkc1RZT+9aGN1L7strCUmoHXtwCE4nK8hodDlZ1AZwQapP//fCBdnVb wAukA3PTAP7zYNpgHTkrs+JjqYoRMxuQnJY2u85kGrvR7TJlu55chxQ5qlEg3QSfkB57 U+Pcf/iQNq0BHxQ+s7KqJ3GHfIBvzvqfPT8kj1k8gdnu6oiho0Oe2ScPt5xu30tkbvTy RBZtRZpYFZsCuSygXdF7B0oBFFQLlajSmEU3ART43ndRNum+//McJQqvpfAjwKt7+SXC zzeQ== X-Gm-Message-State: AOUpUlFTeU879OhgK4+TRP4dp0DA9enrM8x/dszCsAW4UwoitovsEvHM AKvvJK6vaHeLw/9furVOZnEvnA== X-Received: by 2002:a17:902:7896:: with SMTP id q22-v6mr58464507pll.47.1535040547737; Thu, 23 Aug 2018 09:09:07 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id d19-v6sm5788083pgv.61.2018.08.23.09.09.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 Aug 2018 09:09:07 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 24 Aug 2018 00:07:23 +0800 Message-Id: <20180823160743.45638-12-ming.huang@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180823160743.45638-1-ming.huang@linaro.org> References: <20180823160743.45638-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v4 11/31] Silicon/Hisilicon/Acpi: Unify HisiAcpiPlatformDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by UpdateAcpiTable.c and Srat aslc. The struct may be different according to chips, so move some macro to PlatformArch.h. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Reviewed-by: Leif Lindholm --- Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31 ++++++++++++++------ Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 -- 4 files changed, 34 insertions(+), 11 deletions(-) -- 2.18.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h index f39ae0748c..1ebddca4e5 100644 --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h @@ -30,6 +30,12 @@ // Max NUMA node number for each node type #define MAX_NUM_PER_TYPE 8 +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 32 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 + #define S1_BASE 0x40000000000 #define RASC_BASE (0x5000) diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h index 9539cfdada..f3ad45f6c6 100644 --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h @@ -57,5 +57,11 @@ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ } +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 48 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 16 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 1 + #endif diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h index fd05a3b960..2abffb65fc 100644 --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h @@ -19,6 +19,21 @@ #ifndef __ACPI_NEXT_LIB_H__ #define __ACPI_NEXT_LIB_H__ +#include + +/// +/// ITS Affinity Structure Definition +/// +#pragma pack(1) +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT16 Reserved; + UINT32 ItsHwId; +} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE; +#pragma pack() + #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \ { \ EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), EFI_ACPI_RESERVED_WORD, \ @@ -42,8 +57,8 @@ #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \ ProximityDomain, ItsId) \ { \ - 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ - {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \ + 4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ + EFI_ACPI_RESERVED_WORD, ItsId \ } #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \ @@ -75,15 +90,13 @@ // Define the number of each table type. // This is where the table layout is modified. // -#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 -#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 +#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT (MAX_SOCKET*CORE_NUM_PER_SOCKET) typedef struct { - EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; - EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; + EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; #pragma pack() diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index f5869841dc..54f49977c3 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -20,8 +20,6 @@ #include #include -#define CORE_NUM_PER_SOCKET 32 -#define NODE_IN_SOCKET 2 #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET) STATIC