diff mbox series

[v2,1/2] iio: adc: sc27xx: Add raw data support

Message ID 0adef2f9eafa913eb9f4bc1ed3dc643d09bf02a2.1535434262.git.baolin.wang@linaro.org
State Accepted
Commit fd2f53ebf98173d667fe6b9c2300fef8b4f72f30
Headers show
Series [v2,1/2] iio: adc: sc27xx: Add raw data support | expand

Commit Message

(Exiting) Baolin Wang Aug. 29, 2018, 6:04 a.m. UTC
The headset device will use channel 20 of ADC controller to detect events,
but it needs the raw ADC data to do conversion according to its own formula.

Thus we should configure the channel mask separately and configure channel
20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>

---
Changes from v1:
 - None.

---
 drivers/iio/adc/sc27xx_adc.c |   80 ++++++++++++++++++++++++------------------
 1 file changed, 45 insertions(+), 35 deletions(-)

-- 
1.7.9.5

Comments

Jonathan Cameron Sept. 2, 2018, 8:55 a.m. UTC | #1
On Wed, 29 Aug 2018 14:04:05 +0800
Baolin Wang <baolin.wang@linaro.org> wrote:

> This patch adds support to read calibration values from the eFuse

> controller to calibrate the ADC channel scales, which can make ADC

> sample data more accurate.

> 

> Signed-off-by: Baolin Wang <baolin.wang@linaro.org>

Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.

Thanks,

Jonathan

> ---

> Changes from v1:

>  - Use nvmem_cell_read() instead of nvmem_cell_read_u32().

> ---

>  .../bindings/iio/adc/sprd,sc27xx-adc.txt           |    4 ++

>  drivers/iio/adc/sc27xx_adc.c                       |   74 +++++++++++++++++++-

>  2 files changed, 75 insertions(+), 3 deletions(-)

> 

> diff --git a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt b/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt

> index 8aad960..b4daa15 100644

> --- a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt

> +++ b/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt

> @@ -12,6 +12,8 @@ Required properties:

>  - interrupts: The interrupt number for the ADC device.

>  - #io-channel-cells: Number of cells in an IIO specifier.

>  - hwlocks: Reference to a phandle of a hwlock provider node.

> +- nvmem-cells: A phandle to the calibration cells provided by eFuse device.

> +- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib".

>  

>  Example:

>  

> @@ -32,5 +34,7 @@ Example:

>  			interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;

>  			#io-channel-cells = <1>;

>  			hwlocks = <&hwlock 4>;

> +			nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;

> +			nvmem-cell-names = "big_scale_calib", "small_scale_calib";

>  		};

>  	};

> diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c

> index 153c311..7940b23 100644

> --- a/drivers/iio/adc/sc27xx_adc.c

> +++ b/drivers/iio/adc/sc27xx_adc.c

> @@ -5,10 +5,12 @@

>  #include <linux/iio/iio.h>

>  #include <linux/interrupt.h>

>  #include <linux/module.h>

> +#include <linux/nvmem-consumer.h>

>  #include <linux/of.h>

>  #include <linux/of_device.h>

>  #include <linux/platform_device.h>

>  #include <linux/regmap.h>

> +#include <linux/slab.h>

>  

>  /* PMIC global registers definition */

>  #define SC27XX_MODULE_EN		0xc08

> @@ -87,16 +89,73 @@ struct sc27xx_adc_linear_graph {

>   * should use the small-scale graph, and if more than 1.2v, we should use the

>   * big-scale graph.

>   */

> -static const struct sc27xx_adc_linear_graph big_scale_graph = {

> +static struct sc27xx_adc_linear_graph big_scale_graph = {

>  	4200, 3310,

>  	3600, 2832,

>  };

>  

> -static const struct sc27xx_adc_linear_graph small_scale_graph = {

> +static struct sc27xx_adc_linear_graph small_scale_graph = {

>  	1000, 3413,

>  	100, 341,

>  };

>  

> +static const struct sc27xx_adc_linear_graph big_scale_graph_calib = {

> +	4200, 856,

> +	3600, 733,

> +};

> +

> +static const struct sc27xx_adc_linear_graph small_scale_graph_calib = {

> +	1000, 833,

> +	100, 80,

> +};

> +

> +static int sc27xx_adc_get_calib_data(u32 calib_data, int calib_adc)

> +{

> +	return ((calib_data & 0xff) + calib_adc - 128) * 4;

> +}

> +

> +static int sc27xx_adc_scale_calibration(struct sc27xx_adc_data *data,

> +					bool big_scale)

> +{

> +	const struct sc27xx_adc_linear_graph *calib_graph;

> +	struct sc27xx_adc_linear_graph *graph;

> +	struct nvmem_cell *cell;

> +	const char *cell_name;

> +	u32 calib_data = 0;

> +	void *buf;

> +	size_t len;

> +

> +	if (big_scale) {

> +		calib_graph = &big_scale_graph_calib;

> +		graph = &big_scale_graph;

> +		cell_name = "big_scale_calib";

> +	} else {

> +		calib_graph = &small_scale_graph_calib;

> +		graph = &small_scale_graph;

> +		cell_name = "small_scale_calib";

> +	}

> +

> +	cell = nvmem_cell_get(data->dev, cell_name);

> +	if (IS_ERR(cell))

> +		return PTR_ERR(cell);

> +

> +	buf = nvmem_cell_read(cell, &len);

> +	nvmem_cell_put(cell);

> +

> +	if (IS_ERR(buf))

> +		return PTR_ERR(buf);

> +

> +	memcpy(&calib_data, buf, min(len, sizeof(u32)));

> +

> +	/* Only need to calibrate the adc values in the linear graph. */

> +	graph->adc0 = sc27xx_adc_get_calib_data(calib_data, calib_graph->adc0);

> +	graph->adc1 = sc27xx_adc_get_calib_data(calib_data >> 8,

> +						calib_graph->adc1);

> +

> +	kfree(buf);

> +	return 0;

> +}

> +

>  static int sc27xx_adc_get_ratio(int channel, int scale)

>  {

>  	switch (channel) {

> @@ -209,7 +268,7 @@ static void sc27xx_adc_volt_ratio(struct sc27xx_adc_data *data,

>  	*div_denominator = ratio & SC27XX_RATIO_DENOMINATOR_MASK;

>  }

>  

> -static int sc27xx_adc_to_volt(const struct sc27xx_adc_linear_graph *graph,

> +static int sc27xx_adc_to_volt(struct sc27xx_adc_linear_graph *graph,

>  			      int raw_adc)

>  {

>  	int tmp;

> @@ -390,6 +449,15 @@ static int sc27xx_adc_enable(struct sc27xx_adc_data *data)

>  	if (ret)

>  		goto disable_clk;

>  

> +	/* ADC channel scales' calibration from nvmem device */

> +	ret = sc27xx_adc_scale_calibration(data, true);

> +	if (ret)

> +		goto disable_clk;

> +

> +	ret = sc27xx_adc_scale_calibration(data, false);

> +	if (ret)

> +		goto disable_clk;

> +

>  	return 0;

>  

>  disable_clk:

> -- 

> 1.7.9.5

>
(Exiting) Baolin Wang Sept. 3, 2018, 2:20 a.m. UTC | #2
Hi Jonathan,

On 2 September 2018 at 16:51, Jonathan Cameron <jic23@kernel.org> wrote:
> On Wed, 29 Aug 2018 14:04:04 +0800

> Baolin Wang <baolin.wang@linaro.org> wrote:

>

>> The headset device will use channel 20 of ADC controller to detect events,

>> but it needs the raw ADC data to do conversion according to its own formula.

>>

>> Thus we should configure the channel mask separately and configure channel

>> 20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support.

>>

>> Signed-off-by: Baolin Wang <baolin.wang@linaro.org>

> I'm still a little unclear on whether there is fundamentally something different

> about this channel or whether this is just a policy decision for particular

> (possibly all) board.  For now we'll go with this change, but if anyone screams

> we will have to then go the nasty route of supporting both processed and raw

> for channel 20.


Until now, channel 20 is always used for the headset on the SC27xx
series PMICs. Yes, this is a policy decision, but for all the SC27xx
series PMICs.

>

> Applied to the togreg branch of iio.git and pushed out as testing for the

> autobuilders to play with it.


Thanks.

-- 
Baolin Wang
Best Regards
diff mbox series

Patch

diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c
index 2b60efe..153c311 100644
--- a/drivers/iio/adc/sc27xx_adc.c
+++ b/drivers/iio/adc/sc27xx_adc.c
@@ -273,6 +273,17 @@  static int sc27xx_adc_read_raw(struct iio_dev *indio_dev,
 	int ret, tmp;
 
 	switch (mask) {
+	case IIO_CHAN_INFO_RAW:
+		mutex_lock(&indio_dev->mlock);
+		ret = sc27xx_adc_read(data, chan->channel, scale, &tmp);
+		mutex_unlock(&indio_dev->mlock);
+
+		if (ret)
+			return ret;
+
+		*val = tmp;
+		return IIO_VAL_INT;
+
 	case IIO_CHAN_INFO_PROCESSED:
 		mutex_lock(&indio_dev->mlock);
 		ret = sc27xx_adc_read_processed(data, chan->channel, scale,
@@ -315,48 +326,47 @@  static int sc27xx_adc_write_raw(struct iio_dev *indio_dev,
 	.write_raw = &sc27xx_adc_write_raw,
 };
 
-#define SC27XX_ADC_CHANNEL(index) {				\
+#define SC27XX_ADC_CHANNEL(index, mask) {			\
 	.type = IIO_VOLTAGE,					\
 	.channel = index,					\
-	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |	\
-			      BIT(IIO_CHAN_INFO_SCALE),		\
+	.info_mask_separate = mask | BIT(IIO_CHAN_INFO_SCALE),	\
 	.datasheet_name = "CH##index",				\
 	.indexed = 1,						\
 }
 
 static const struct iio_chan_spec sc27xx_channels[] = {
-	SC27XX_ADC_CHANNEL(0),
-	SC27XX_ADC_CHANNEL(1),
-	SC27XX_ADC_CHANNEL(2),
-	SC27XX_ADC_CHANNEL(3),
-	SC27XX_ADC_CHANNEL(4),
-	SC27XX_ADC_CHANNEL(5),
-	SC27XX_ADC_CHANNEL(6),
-	SC27XX_ADC_CHANNEL(7),
-	SC27XX_ADC_CHANNEL(8),
-	SC27XX_ADC_CHANNEL(9),
-	SC27XX_ADC_CHANNEL(10),
-	SC27XX_ADC_CHANNEL(11),
-	SC27XX_ADC_CHANNEL(12),
-	SC27XX_ADC_CHANNEL(13),
-	SC27XX_ADC_CHANNEL(14),
-	SC27XX_ADC_CHANNEL(15),
-	SC27XX_ADC_CHANNEL(16),
-	SC27XX_ADC_CHANNEL(17),
-	SC27XX_ADC_CHANNEL(18),
-	SC27XX_ADC_CHANNEL(19),
-	SC27XX_ADC_CHANNEL(20),
-	SC27XX_ADC_CHANNEL(21),
-	SC27XX_ADC_CHANNEL(22),
-	SC27XX_ADC_CHANNEL(23),
-	SC27XX_ADC_CHANNEL(24),
-	SC27XX_ADC_CHANNEL(25),
-	SC27XX_ADC_CHANNEL(26),
-	SC27XX_ADC_CHANNEL(27),
-	SC27XX_ADC_CHANNEL(28),
-	SC27XX_ADC_CHANNEL(29),
-	SC27XX_ADC_CHANNEL(30),
-	SC27XX_ADC_CHANNEL(31),
+	SC27XX_ADC_CHANNEL(0, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(1, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(2, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(3, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(4, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(5, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(6, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(7, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(8, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(9, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(10, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(11, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(12, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(13, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(14, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(15, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(16, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(17, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(18, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(19, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(20, BIT(IIO_CHAN_INFO_RAW)),
+	SC27XX_ADC_CHANNEL(21, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(22, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(23, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(24, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(25, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(26, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(27, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(28, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(29, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(30, BIT(IIO_CHAN_INFO_PROCESSED)),
+	SC27XX_ADC_CHANNEL(31, BIT(IIO_CHAN_INFO_PROCESSED)),
 };
 
 static int sc27xx_adc_enable(struct sc27xx_adc_data *data)