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[209.132.180.67]) by mx.google.com with ESMTP id a6-v6si5707520plz.227.2018.08.30.01.22.41; Thu, 30 Aug 2018 01:22:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ehdLvAHu; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728134AbeH3MXi (ORCPT + 5 others); Thu, 30 Aug 2018 08:23:38 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:40508 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728068AbeH3MXh (ORCPT ); Thu, 30 Aug 2018 08:23:37 -0400 Received: by mail-pf1-f194.google.com with SMTP id s13-v6so3550340pfi.7 for ; Thu, 30 Aug 2018 01:22:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/RXtHte8bNFCXLz2sWlB+/MjHMcewoMGpsLw3S8KcCM=; b=ehdLvAHulsqEGy2bI4CKy7Yju2jHtCBeOXunvc9ihc53cj2WslPESCJbLHPy1vlTvy E5paeKwr31lXBvDbVokPkwrPYr9JEkaEUbQw9yqhF3NaN+wyhQjNA6FcnMP49yd6Z83z K4WhB54ZIzBNrW5MufdnAHX7F7gaN8WAyiYeA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/RXtHte8bNFCXLz2sWlB+/MjHMcewoMGpsLw3S8KcCM=; b=ZmrfRNUsSLq+pYcKChRPWwc9zxyT06TQ6mVM4qv0tSkmpnWpSmSOD7ESExAWeSAzCC dw0QOcjH7og99o/Y+Fba8CLiBAGmEftsSWC6iYzQGhWRvgPQ+23b2FdxIFV4mPqeo5Ib m39w753kDZW9gEjJa3BTDKn4etvYcTf0RFCzUOO/ppIjfq6GF53oXXOsgu4LFTafa2ee D7LcCvcc2atudkHjbh3ESttme10RpVzuEI71JIrSefC1LngdvkQ711hOz1BOx+TxlFBj 3pfNopxoPzaNP6EonfpV3KZ5MOOFq0iik+6Wm92NhxMlzqA66DCfbjJSR3gQcGBwZBZy Cejg== X-Gm-Message-State: APzg51DyPs0/OInoVEOIQeYd2rizj5leXCE4tBZKSMNOLrkeTcUIQRe6 A/6c/bSuGyfs673D7QBU5jrKwQ== X-Received: by 2002:a65:6413:: with SMTP id a19-v6mr1774313pgv.359.1535617359659; Thu, 30 Aug 2018 01:22:39 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id j22-v6sm8224885pfh.45.2018.08.30.01.22.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Aug 2018 01:22:38 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter , Rob Herring Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , Chunyan Zhang , Chunyan Zhang Subject: [PATCH V8 9/9] dt-bindings: sdhci-sprd: Add bindings for the sdhci-sprd controller Date: Thu, 30 Aug 2018 16:21:45 +0800 Message-Id: <1535617305-16952-10-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535617305-16952-1-git-send-email-zhang.chunyan@linaro.org> References: <1535617305-16952-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Chunyan Zhang This patch adds the device-tree binding documentation for Spreadtrum SDHCI driver. Signed-off-by: Chunyan Zhang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-sprd.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt new file mode 100644 index 0000000..45c9978 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -0,0 +1,41 @@ +* Spreadtrum SDHCI controller (sdhci-sprd) + +The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface +for MMC, SD and SDIO types of cards. + +This file documents differences between the core properties in mmc.txt +and the properties used by the sdhci-sprd driver. + +Required properties: +- compatible: Should contain "sprd,sdhci-r11". +- reg: physical base address of the controller and length. +- interrupts: Interrupts used by the SDHCI controller. +- clocks: Should contain phandle for the clock feeding the SDHCI controller +- clock-names: Should contain the following: + "sdio" - SDIO source clock (required) + "enable" - gate clock which used for enabling/disabling the device (required) + +Optional properties: +- assigned-clocks: the same with "sdio" clock +- assigned-clock-parents: the default parent of "sdio" clock + +Examples: + +sdio0: sdio@20600000 { + compatible = "sprd,sdhci-r11"; + reg = <0 0x20600000 0 0x1000>; + interrupts = ; + + clock-names = "sdio", "enable"; + clocks = <&ap_clk CLK_EMMC_2X>, + <&apahb_gate CLK_EMMC_EB>; + assigned-clocks = <&ap_clk CLK_EMMC_2X>; + assigned-clock-parents = <&rpll CLK_RPLL_390M>; + + bus-width = <8>; + non-removable; + no-sdio; + no-sd; + cap-mmc-hw-reset; + status = "okay"; +};