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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id q128-v6sm3665503ljq.72.2018.09.03.14.50.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Sep 2018 14:50:54 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org, Andrzej Hajda , Lorenzo Bianconi Cc: linux-gpio@vger.kernel.org, Rob Herring , Linus Walleij Subject: [PATCH 4/4] spi: gpio: Support 3WIRE high impedance turn-around Date: Mon, 3 Sep 2018 23:50:35 +0200 Message-Id: <20180903215035.17265-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180903215035.17265-1-linus.walleij@linaro.org> References: <20180903215035.17265-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Some devices such as the TPO TPG110 display panel require a "high impedance turnaround", in effect a clock cycle after switching the line from output to input mode. Support this in the GPIO driver to begin with. Other driver may implement it if they can, it is unclear if this can be achieved with anything else than GPIO bit-banging. Cc: Andrzej Hajda Cc: Lorenzo Bianconi Signed-off-by: Linus Walleij --- drivers/spi/spi-gpio.c | 24 +++++++++++++++++++++--- drivers/spi/spi.c | 2 ++ include/linux/spi/spi.h | 1 + 3 files changed, 24 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 6bd692304b92..36e481ad38f7 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c @@ -265,11 +265,29 @@ static int spi_gpio_setup(struct spi_device *spi) static int spi_gpio_set_direction(struct spi_device *spi, bool output) { struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + int ret; if (output) return gpiod_direction_output(spi_gpio->mosi, 1); - else - return gpiod_direction_input(spi_gpio->mosi); + + ret = gpiod_direction_input(spi_gpio->mosi); + if (ret) + return ret; + /* + * Send a turnaround high impedance cycle when switching + * from output to input. Theoretically there should be + * a clock delay here, but as has been noted above, the + * nsec delay function for bit-banged GPIO is simply + * {} because bit-banging just doesn't get fast enough + * anyway. + */ + if (spi->mode & SPI_3WIRE_HIZ) { + gpiod_set_value_cansleep(spi_gpio->sck, + !(spi->mode & SPI_CPOL)); + gpiod_set_value_cansleep(spi_gpio->sck, + !!(spi->mode & SPI_CPOL)); + } + return 0; } static void spi_gpio_cleanup(struct spi_device *spi) @@ -417,7 +435,7 @@ static int spi_gpio_probe(struct platform_device *pdev) return status; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->mode_bits = SPI_3WIRE | SPI_CPHA | SPI_CPOL; + master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL; master->flags = master_flags; master->bus_num = pdev->id; /* The master needs to think there is a chipselect even if not connected */ diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index f6f9314e9a18..97159cedd6dd 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1559,6 +1559,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, spi->mode |= SPI_CS_HIGH; if (of_property_read_bool(nc, "spi-3wire")) spi->mode |= SPI_3WIRE; + if (of_property_read_bool(nc, "spi-3wire-high-impedance-turnaround")) + spi->mode |= SPI_3WIRE_HIZ; if (of_property_read_bool(nc, "spi-lsb-first")) spi->mode |= SPI_LSB_FIRST; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index a64235e05321..b58aaf4a4e4b 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -163,6 +163,7 @@ struct spi_device { #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ #define SPI_RX_DUAL 0x400 /* receive with 2 wires */ #define SPI_RX_QUAD 0x800 /* receive with 4 wires */ +#define SPI_3WIRE_HIZ 0x1000 /* high impedance turnaround */ int irq; void *controller_state; void *controller_data;