diff mbox series

arm64: dts: lg: Fix SPI controller node names

Message ID 20180913181245.25484-20-robh@kernel.org
State Accepted
Commit 09bae3b64cb580c95329bd8d16f08f0a5cb81ec9
Headers show
Series arm64: dts: lg: Fix SPI controller node names | expand

Commit Message

Rob Herring Sept. 13, 2018, 6:12 p.m. UTC
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.

Cc: Chanho Min <chanho.min@lge.com>
Signed-off-by: Rob Herring <robh@kernel.org>

---
Please apply to the sub-arch tree. The dtc changes haven't landed, but 
will for 4.20.

 arch/arm64/boot/dts/lg/lg1312.dtsi | 4 ++--
 arch/arm64/boot/dts/lg/lg1313.dtsi | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

-- 
2.17.1

Comments

Rob Herring Sept. 26, 2018, 11:11 p.m. UTC | #1
On Thu, Sep 13, 2018 at 1:13 PM Rob Herring <robh@kernel.org> wrote:
>

> SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the

> name enables dtc SPI bus checks.

>

> Cc: Chanho Min <chanho.min@lge.com>

> Signed-off-by: Rob Herring <robh@kernel.org>

> ---

> Please apply to the sub-arch tree. The dtc changes haven't landed, but

> will for 4.20.


Ping.

Arnd, Olof, Can you pick this up if the sub-arch maintainer doesn't.

Rob
Arnd Bergmann Sept. 28, 2018, 10:33 a.m. UTC | #2
On Thu, Sep 13, 2018 at 8:13 PM Rob Herring <robh@kernel.org> wrote:
>

> SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the

> name enables dtc SPI bus checks.

>

> Cc: Chanho Min <chanho.min@lge.com>

> Signed-off-by: Rob Herring <robh@kernel.org>

> ---


Applied, thanks!

      Arnd
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index 860c8fb10795..4bde7b6f2b11 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -168,14 +168,14 @@ 
 			clock-names = "apb_pclk";
 			status="disabled";
 		};
-		spi0: ssp@fe800000 {
+		spi0: spi@fe800000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x0 0xfe800000 0x1000>;
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk_bus>;
 			clock-names = "apb_pclk";
 		};
-		spi1: ssp@fe900000 {
+		spi1: spi@fe900000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x0 0xfe900000 0x1000>;
 			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index 1887af654a7d..16ced1ff1ad3 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -168,14 +168,14 @@ 
 			clock-names = "apb_pclk";
 			status="disabled";
 		};
-		spi0: ssp@fe800000 {
+		spi0: spi@fe800000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x0 0xfe800000 0x1000>;
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk_bus>;
 			clock-names = "apb_pclk";
 		};
-		spi1: ssp@fe900000 {
+		spi1: spi@fe900000 {
 			compatible = "arm,pl022", "arm,primecell";
 			reg = <0x0 0xfe900000 0x1000>;
 			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;