[4/4] arm64: dts: exynos: Update DWC3 modules on Exynos5433 SoCs

Message ID 20180918081653.314-5-m.szyprowski@samsung.com
State New
Headers show
Series
  • Untitled series #14909
Related show

Commit Message

Marek Szyprowski Sept. 18, 2018, 8:16 a.m.
Update DWC3 hardware modules to Exynos5433 specific variant: change
compatible name and add all required clocks (both to the glue node and
DWC3 core node).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

-- 
2.17.1

Comments

Krzysztof Kozlowski Sept. 19, 2018, 5:14 p.m. | #1
On Tue, Sep 18, 2018 at 10:16:53AM +0200, Marek Szyprowski wrote:
> Update DWC3 hardware modules to Exynos5433 specific variant: change

> compatible name and add all required clocks (both to the glue node and

> DWC3 core node).

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++------

>  1 file changed, 18 insertions(+), 6 deletions(-)


Looks okay. I understand this depends on driver changes so I will take
it for next release.

Best regards,
Krzysztof
Krzysztof Kozlowski Nov. 13, 2018, 7:25 p.m. | #2
On Tue, Sep 18, 2018 at 10:16:53AM +0200, Marek Szyprowski wrote:
> Update DWC3 hardware modules to Exynos5433 specific variant: change

> compatible name and add all required clocks (both to the glue node and

> DWC3 core node).

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 ++++++++++++++++------


Thanks, applied.

Best regards,
Krzysztof

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 162653b538bc..77297d66642c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1608,10 +1608,12 @@ 
 		};
 
 		usbdrd30: usbdrd {
-			compatible = "samsung,exynos5250-dwusb3";
+			compatible = "samsung,exynos5433-dwusb3";
 			clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,
-				<&cmu_fsys CLK_SCLK_USBDRD30>;
-			clock-names = "usbdrd30", "usbdrd30_susp_clk";
+				<&cmu_fsys CLK_SCLK_USBDRD30>,
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,
+				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>;
+			clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -1619,6 +1621,10 @@ 
 
 			usbdrd_dwc3: dwc3@15400000 {
 				compatible = "snps,dwc3";
+				clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,
+					<&cmu_fsys CLK_ACLK_USBDRD30>,
+					<&cmu_fsys CLK_SCLK_USBDRD30>;
+				clock-names = "ref", "bus_early", "suspend";
 				reg = <0x15400000 0x10000>;
 				interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
 				phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
@@ -1655,10 +1661,12 @@ 
 		};
 
 		usbhost30: usbhost {
-			compatible = "samsung,exynos5250-dwusb3";
+			compatible = "samsung,exynos5433-dwusb3";
 			clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,
-				<&cmu_fsys CLK_SCLK_USBHOST30>;
-			clock-names = "usbdrd30", "usbdrd30_susp_clk";
+				<&cmu_fsys CLK_SCLK_USBHOST30>,
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>,
+				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>;
+			clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -1666,6 +1674,10 @@ 
 
 			usbhost_dwc3: dwc3@15a00000 {
 				compatible = "snps,dwc3";
+				clocks = <&cmu_fsys CLK_SCLK_USBHOST30>,
+					<&cmu_fsys CLK_ACLK_USBHOST30>,
+					<&cmu_fsys CLK_SCLK_USBHOST30>;
+				clock-names = "ref", "bus_early", "suspend";
 				reg = <0x15a00000 0x10000>;
 				interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
 				phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;