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[209.132.180.131]) by mx.google.com with ESMTPS id j16-v6si14913062pgg.350.2018.10.02.09.21.22 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Oct 2018 09:21:23 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-486823-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=PNyfKQ8T; dkim=pass header.i=@linaro.org header.s=google header.b="CHhG/oAl"; spf=pass (google.com: domain of gcc-patches-return-486823-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-486823-patch=linaro.org@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=UgoGW9FN/66RMN9oe+oFfPQZlI6JNb7IcZdMTuTwx+2pmgukXQZU5 EuUHU82p1M/B1RwmN3ltGvFtZ5QW3ogX+/QHzMm7CXADBMJuoSKxkcoLmJxBjJNj GrkN8KvHYZGJCrfoxM9wh/QCJn526S/Z2EuvMWeJln0qbcsOPUPSPk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=/WBIAX1IXESgM+FCpITJNnyWc1c=; b=PNyfKQ8TiwVQ8xwCr9Lv 3XPgT+w7QWoIb0XuZGD6LmLLpOr07ilKwm1F4adWysPnA4vjjQj6PwAv9LX15ouY diT7n5G/Ix41rqQDmUAUZu+tKt35fST8gT4ndk7DqEwCCpr19R7NuYorANvVkEWE EXfCmkUIHjcjZFeULk1KuR8= Received: (qmail 68157 invoked by alias); 2 Oct 2018 16:19:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 68087 invoked by uid 89); 2 Oct 2018 16:19:39 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1294, held X-HELO: mail-ot1-f48.google.com Received: from mail-ot1-f48.google.com (HELO mail-ot1-f48.google.com) (209.85.210.48) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 02 Oct 2018 16:19:37 +0000 Received: by mail-ot1-f48.google.com with SMTP id i12-v6so2499966otl.1 for ; Tue, 02 Oct 2018 09:19:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bFXjP9PN/RPdCfNaKD9wfHUaATK/mX8xFl2hNp4yRyY=; b=CHhG/oAlwjia+n4E5pQOg1ETsXlv/nm6gU7YKeCd8TUdrli0TwC0DXB0qLc9nQ8+oM KvnU9Nm037DHA7VALL9kbkBw0AL5v9z2Oj1sRzwUek4KdGLsZamboDkuTtFzjRdPeiMK btgjw7QVd6Nnwp6X9gnZsGjSp9/+9aUM8ICFQ= Return-Path: Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id j15-v6sm145987oth.27.2018.10.02.09.19.34 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 Oct 2018 09:19:35 -0700 (PDT) From: Richard Henderson To: gcc-patches@gcc.gnu.org Cc: ramana.radhakrishnan@arm.com, agraf@suse.de, marcus.shawcroft@arm.com, james.greenhalgh@arm.com, richard.earnshaw@arm.com Subject: [PATCH, AArch64 v2 09/11] aarch64: Force TImode values into even registers Date: Tue, 2 Oct 2018 11:19:13 -0500 Message-Id: <20181002161915.18843-10-richard.henderson@linaro.org> In-Reply-To: <20181002161915.18843-1-richard.henderson@linaro.org> References: <20181002161915.18843-1-richard.henderson@linaro.org> The LSE CASP instruction requires values to be placed in even register pairs. A solution involving two additional register classes was rejected in favor of the much simpler solution of simply requiring all TImode values to be aligned. * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Force 16-byte modes held in GP registers to use an even regno. --- gcc/config/aarch64/aarch64.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 49b47382b5d..ce4d7e51d00 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1451,10 +1451,14 @@ aarch64_hard_regno_mode_ok (unsigned regno, machine_mode mode) if (regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM) return mode == Pmode; - if (GP_REGNUM_P (regno) && known_le (GET_MODE_SIZE (mode), 16)) - return true; - - if (FP_REGNUM_P (regno)) + if (GP_REGNUM_P (regno)) + { + if (known_le (GET_MODE_SIZE (mode), 8)) + return true; + else if (known_le (GET_MODE_SIZE (mode), 16)) + return (regno & 1) == 0; + } + else if (FP_REGNUM_P (regno)) { if (vec_flags & VEC_STRUCT) return end_hard_regno (mode, regno) - 1 <= V31_REGNUM;