From patchwork Mon Nov 12 15:23:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 150850 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3268993ljp; Mon, 12 Nov 2018 07:23:55 -0800 (PST) X-Google-Smtp-Source: AJdET5f78G1rtPsD4cLTJbg5aSANMy4TRdYHU7Ad61NrFpWgReB7o9G467QDrnNYbOvVA9P/Y8i6 X-Received: by 2002:a62:3346:: with SMTP id z67-v6mr1340260pfz.112.1542036235720; Mon, 12 Nov 2018 07:23:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542036235; cv=none; d=google.com; s=arc-20160816; b=D3lO7DniZDFu1BfHtdL6b5WV54l6xaNfCC9iDI76mFA0/7qaFZ8VgG7etrTH3M6Vcz E8HEm5TxBJ4rG9kBNBlW+cpfpx/o386ACE4HzuUMbiob3C4aned74UnG/bRIeKqGr++m pETLWxAcxsI7Eb5QO+MY5lmNAH5i0B0JcMlBP71Kfam2JKaF92jh2EKrbAylI/OCAwQD xpbacq2+PGWCKcieoKQ6rWQfk5J3k3vr5GtfL1/We/mIdhcoZBW8BUdYdQRiScr668NT V32q/GU2Z4Kv7Ym3eEvNq0ds1w7ETaXWgx7bMplVVC/XH+0x5YTjKdr9Avu1MfiF/+vK jrbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=+scvbKSgWS1sZ8YB01SJV/sDev8JcNZzuzRnAPkaFfU=; b=Nq9Xxo+eolBpSn+qbV47TzMOPbkpv4HtiXWD48lDvfhxe2wHitQiV2fZGP0JowC1iO OJ0UZixKCLmoqAibkBjBnOsSss0FdcDUT26/mzUqJecd1LHu9RjoJ+NG65zZRSmF9Hf0 Go3j/LBHzqdNxhdIeJYo2EZWH1IU3ChkbExb/Ri0WkGGDaJOvQR+Ln1wtJmtfXm4fwOf IhCvPEjnuLJyFKaVUG+uYKyAeN1cgXUIYZ+Z0CnVLiRz7I/q7SC4NCjRGSiAmRNkZ4IO 3psH5uH1RhKi86xCt4WDwndg6cmXPT8jb8+riMJ59hbwc+l5yXccEDNjdb6/3hcioQHs kHew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b6y9GgLs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v4-v6si17315146plp.247.2018.11.12.07.23.55; Mon, 12 Nov 2018 07:23:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b6y9GgLs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729735AbeKMBRg (ORCPT + 32 others); Mon, 12 Nov 2018 20:17:36 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:44197 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726981AbeKMBRe (ORCPT ); Mon, 12 Nov 2018 20:17:34 -0500 Received: by mail-wr1-f67.google.com with SMTP id j17-v6so9777532wrq.11 for ; Mon, 12 Nov 2018 07:23:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+scvbKSgWS1sZ8YB01SJV/sDev8JcNZzuzRnAPkaFfU=; b=b6y9GgLsXE2zRQnjmQunelvLgg8c9S0wwRJK0W/oiYfTleWd3qPPEJApTjNUCCq1EE uaozXLjzqYz84qZx6+GQRfk9u5zF9wjXRzAnEfyd7g5iykFth4NhXtDktP1yC+M3mIau 3mKYNxogJxOm+cDKkyc/0ftEVUj9LKTcW90lo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+scvbKSgWS1sZ8YB01SJV/sDev8JcNZzuzRnAPkaFfU=; b=Db+AcjEy4adHA/j9wfoB42BbnU8Zb2URVqyb+DILc5fku6AVVxT6nf82RUz4nK1cco 69z0QiaoQgfqELGfxyPJ1hzmrg1wuSb/Yv4d6KXoJA1TpMASc++ewfaCVaC77YPl2gWh 5yBSvUSoAvVo02eutXv+ZMBHP7xv5muvGdrdioyHmLEfqNO7sIH2Wa5GYoeJSCqIkrft 3MQZEFaTyhr3K+zrrbwkTGU3nPCjDVi5Pv2w5cyHJJuWhL6CV/JbcY6tY6PseA6uL2gZ qYgOYq+cgp5g9yKPf2aw+StjoKO1m1ZxosEjJ4Y+LkxEJUPEIr6Ityle5deztOEi7ujO aaNQ== X-Gm-Message-State: AGRZ1gL1ODuQ1nPSSa46H15sauHvjKkGKX/H3nTnkIa5XTuOcA0LkrzU hM0zC1pPLnO35UqWBqlu2fuH9Q== X-Received: by 2002:a5d:410d:: with SMTP id l13-v6mr1363524wrp.61.1542036230916; Mon, 12 Nov 2018 07:23:50 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:105e:a8d5:7c2c:2737:d373:11ee]) by smtp.gmail.com with ESMTPSA id t82-v6sm11192849wme.30.2018.11.12.07.23.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 12 Nov 2018 07:23:50 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Benjamin Gaignard Subject: [PATCH v3 1/4] dt-bindings: hwlock: Document STM32 hwspinlock bindings Date: Mon, 12 Nov 2018 16:23:39 +0100 Message-Id: <20181112152342.6561-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181112152342.6561-1-benjamin.gaignard@st.com> References: <20181112152342.6561-1-benjamin.gaignard@st.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add bindings for STM32 hardware spinlock device Signed-off-by: Benjamin Gaignard --- version 3 : - fix clock name in properties description version 2 : - change clock name from hwspinlock to hsem to be align with hardware documentation .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt -- 2.15.0 diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt new file mode 100644 index 000000000000..adf4f000ea3d --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt @@ -0,0 +1,23 @@ +STM32 Hardware Spinlock Device Binding +------------------------------------- + +Required properties : +- compatible : should be "st,stm32-hwspinlock". +- reg : the register address of hwspinlock. +- #hwlock-cells : hwlock users only use the hwlock id to represent a specific + hwlock, so the number of cells should be <1> here. +- clock-names : Must contain "hsem". +- clocks : Must contain a phandle entry for the clock in clock-names, see the + common clock bindings. + +Please look at the generic hwlock binding for usage information for consumers, +"Documentation/devicetree/bindings/hwlock/hwlock.txt" + +Example of hwlock provider: + hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hsem"; + };