drm/panel: Set max rate for Ilitek ILI9881C

Message ID 20181114111711.27367-1-linus.walleij@linaro.org
State New
Headers show
Series
  • drm/panel: Set max rate for Ilitek ILI9881C
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Commit Message

Linus Walleij Nov. 14, 2018, 11:17 a.m.
After adding the hs_rate and lp_rate fields to the DSI device
we need to populate these accordingly so display drivers can
respect them.

This figure for HS rate comes from the ILI9881C manual, the
calculation is explained in the comment.

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Maxime Ripard Nov. 14, 2018, 12:14 p.m. | #1
On Wed, Nov 14, 2018 at 12:17:11PM +0100, Linus Walleij wrote:
> After adding the hs_rate and lp_rate fields to the DSI device

> we need to populate these accordingly so display drivers can

> respect them.

> 

> This figure for HS rate comes from the ILI9881C manual, the

> calculation is explained in the comment.

> 

> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>

> Cc: Andrzej Hajda <a.hajda@samsung.com>

> Cc: Maxime Ripard <maxime.ripard@bootlin.com>

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>


Thanks!
Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Andrzej Hajda Nov. 14, 2018, 3:14 p.m. | #2
On 14.11.2018 12:17, Linus Walleij wrote:
> After adding the hs_rate and lp_rate fields to the DSI device
> we need to populate these accordingly so display drivers can
> respect them.
>
> This figure for HS rate comes from the ILI9881C manual, the
> calculation is explained in the comment.
>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Andrzej Hajda <a.hajda@samsung.com>
> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> index 3ad4a46c4e94..f58250f84f8c 100644
> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
> @@ -465,6 +465,13 @@ static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)
>  	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
>  	dsi->format = MIPI_DSI_FMT_RGB888;
>  	dsi->lanes = 4;
> +	/*
> +	 * The datasheet (table 39) specifies "limited clock channel speed"
> +	 * for 4 lanes as 550 Mbps for RGB888. As this is 4 bits at the time,
> +	 * the maximum HS frequency is 550/4 = 137.5 MHz.
> +	 */
> +	dsi->hs_rate = 137500000;
> +	/* FIXME: LP max rate does not seem to be specified */
>  
>  	return mipi_dsi_attach(dsi);
>  }

Table 42 says: "Length of LP-00, LP-01, LP-10 or LP-11 periods": min
50ns, max 75ns.

1/50ns = max LPM rate = 20.000.000Hz


Regards

Andrzej
Andrzej Hajda Nov. 15, 2018, 7:17 a.m. | #3
On 14.11.2018 16:14, Andrzej Hajda wrote:
> On 14.11.2018 12:17, Linus Walleij wrote:
>> After adding the hs_rate and lp_rate fields to the DSI device
>> we need to populate these accordingly so display drivers can
>> respect them.
>>
>> This figure for HS rate comes from the ILI9881C manual, the
>> calculation is explained in the comment.
>>
>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>> Cc: Andrzej Hajda <a.hajda@samsung.com>
>> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
>>  drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
>> index 3ad4a46c4e94..f58250f84f8c 100644
>> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
>> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
>> @@ -465,6 +465,13 @@ static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)
>>  	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
>>  	dsi->format = MIPI_DSI_FMT_RGB888;
>>  	dsi->lanes = 4;
>> +	/*
>> +	 * The datasheet (table 39) specifies "limited clock channel speed"
>> +	 * for 4 lanes as 550 Mbps for RGB888. As this is 4 bits at the time,
>> +	 * the maximum HS frequency is 550/4 = 137.5 MHz.
>> +	 */
>> +	dsi->hs_rate = 137500000;
>> +	/* FIXME: LP max rate does not seem to be specified */
>>  
>>  	return mipi_dsi_attach(dsi);
>>  }
> Table 42 says: "Length of LP-00, LP-01, LP-10 or LP-11 periods": min
> 50ns, max 75ns.
>
> 1/50ns = max LPM rate = 20.000.000Hz

...and since in LP transmission there are two periods per bit it should
be divided by 2.

So max LPM rate shall be 10.000.000Hz - anyway it would be good if
somebody verifies it.


Regards

Andrzej


>
>
> Regards
>
> Andrzej
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

Patch

diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
index 3ad4a46c4e94..f58250f84f8c 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
@@ -465,6 +465,13 @@  static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->lanes = 4;
+	/*
+	 * The datasheet (table 39) specifies "limited clock channel speed"
+	 * for 4 lanes as 550 Mbps for RGB888. As this is 4 bits at the time,
+	 * the maximum HS frequency is 550/4 = 137.5 MHz.
+	 */
+	dsi->hs_rate = 137500000;
+	/* FIXME: LP max rate does not seem to be specified */
 
 	return mipi_dsi_attach(dsi);
 }