From patchwork Mon Nov 19 09:25:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Todor Tomov X-Patchwork-Id: 151461 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2429033ljp; Mon, 19 Nov 2018 01:25:50 -0800 (PST) X-Google-Smtp-Source: AJdET5eXN3ikMG24oZnPMGUVAOto/CanJyjGSVHkshHxnoG4os2J7iMC+Y2GUmIetZYnFWoYkXyR X-Received: by 2002:a62:8f8c:: with SMTP id n134-v6mr22400642pfd.258.1542619550242; Mon, 19 Nov 2018 01:25:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542619550; cv=none; d=google.com; s=arc-20160816; b=dHXV51w8SYcbtDKo3LAP77/Bw+GXN3MFmlg7F2rMugkyCaeOmvRRB0oJIoiHxQM5wb /eyk+4gNSStmMBQ3J41ox4bOStabLeP0JFP3/0532iUuBmeIDVLXsdyoGiGXQgPBTPzY lpfRjjpto6Hyl3QeP0zNwdPxD6gf50y6zDhmBOvibglND5+aG9rbO7y+xronsAJ+457T 6kVxfnDlUH0stmqrM8CCY4bzcHi54n4VxrVUOYFZYra5B62CRHcpDjB5DXDQgQ5sNB+E wijINdPlLfGgzXMh0IyaslkDrtYT4kI4uNdHXmTTVALpqUQWHJrBIEUI+Bak9T9jiiSY ZEaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=Q+Joi/BmMbP6j6qm2+QmD4uPoVXy9UZzS5u9/8tjTvk=; b=SwcrGdAQBfnM6SRiK5gArWmrHhvMCbxazDgnLY6z5jfP4TanZVE2HNHTHFvwCx67GQ Wyos2YGO1TixlxvM1lc6+kVi1eXOl2yh9uiJep0V7zBNKPYWUghORo0eR6yxuIyiQcOE TTx+oMJ3wCzFq6VBPZjrvb1VjybJhUnJO3YEl85zTMrp9hQSUwVj7/9B7AWXcuzv6E7P gIDZjleAR3KK9sMIh4/we1lopXyB8Eax07BgavLw75DtJAVoe83w+aIH1aUJEpK8G6nt /ZlLYE4fn5Kad9xSBjQ6wMoNQ879QmpDDQ5tcK4yqr1MwGaY32NavCAm3ebDGLv1N1aC to5g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z86si26896382pfl.209.2018.11.19.01.25.50; Mon, 19 Nov 2018 01:25:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727470AbeKSTsw (ORCPT + 6 others); Mon, 19 Nov 2018 14:48:52 -0500 Received: from ns.mm-sol.com ([37.157.136.199]:58276 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726988AbeKSTsw (ORCPT ); Mon, 19 Nov 2018 14:48:52 -0500 Received: from mms-0439.qualcomm.mm-sol.com (unknown [37.157.136.206]) by extserv.mm-sol.com (Postfix) with ESMTPSA id 37EE04F883; Mon, 19 Nov 2018 11:25:47 +0200 (EET) From: Todor Tomov To: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vivek.gautam@codeaurora.org, Todor Tomov Subject: [PATCH 2/2] arm64: dts: qcom: msm8996: Add CAMSS support Date: Mon, 19 Nov 2018 11:25:37 +0200 Message-Id: <1542619537-24038-2-git-send-email-todor.tomov@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1542619537-24038-1-git-send-email-todor.tomov@linaro.org> References: <1542619537-24038-1-git-send-email-todor.tomov@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a node for the Camera Subsystem present on the Qualcomm MSM8996 SoC. Signed-off-by: Todor Tomov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 135 ++++++++++++++++++++++++++++++++++ 1 file changed, 135 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index a4d087e5..8585c61 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -967,6 +967,141 @@ status = "ok"; }; + camss: camss@a00000 { + compatible = "qcom,msm8996-camss"; + reg = <0xa34000 0x1000>, + <0xa00030 0x4>, + <0xa35000 0x1000>, + <0xa00038 0x4>, + <0xa36000 0x1000>, + <0xa00040 0x4>, + <0xa30000 0x100>, + <0xa30400 0x100>, + <0xa30800 0x100>, + <0xa30c00 0x100>, + <0xa31000 0x500>, + <0xa00020 0x10>, + <0xa10000 0x1000>, + <0xa14000 0x1000>; + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csiphy2", + "csiphy2_clk_mux", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "csi_clk_mux", + "vfe0", + "vfe1"; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csiphy0", + "csiphy1", + "csiphy2", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "vfe0", + "vfe1"; + power-domains = <&mmcc VFE0_GDSC>; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_ISPIF_AHB_CLK>, + <&mmcc CAMSS_CSI0PHYTIMER_CLK>, + <&mmcc CAMSS_CSI1PHYTIMER_CLK>, + <&mmcc CAMSS_CSI2PHYTIMER_CLK>, + <&mmcc CAMSS_CSI0_AHB_CLK>, + <&mmcc CAMSS_CSI0_CLK>, + <&mmcc CAMSS_CSI0PHY_CLK>, + <&mmcc CAMSS_CSI0PIX_CLK>, + <&mmcc CAMSS_CSI0RDI_CLK>, + <&mmcc CAMSS_CSI1_AHB_CLK>, + <&mmcc CAMSS_CSI1_CLK>, + <&mmcc CAMSS_CSI1PHY_CLK>, + <&mmcc CAMSS_CSI1PIX_CLK>, + <&mmcc CAMSS_CSI1RDI_CLK>, + <&mmcc CAMSS_CSI2_AHB_CLK>, + <&mmcc CAMSS_CSI2_CLK>, + <&mmcc CAMSS_CSI2PHY_CLK>, + <&mmcc CAMSS_CSI2PIX_CLK>, + <&mmcc CAMSS_CSI2RDI_CLK>, + <&mmcc CAMSS_CSI3_AHB_CLK>, + <&mmcc CAMSS_CSI3_CLK>, + <&mmcc CAMSS_CSI3PHY_CLK>, + <&mmcc CAMSS_CSI3PIX_CLK>, + <&mmcc CAMSS_CSI3RDI_CLK>, + <&mmcc CAMSS_AHB_CLK>, + <&mmcc CAMSS_VFE0_CLK>, + <&mmcc CAMSS_CSI_VFE0_CLK>, + <&mmcc CAMSS_VFE0_AHB_CLK>, + <&mmcc CAMSS_VFE0_STREAM_CLK>, + <&mmcc CAMSS_VFE1_CLK>, + <&mmcc CAMSS_CSI_VFE1_CLK>, + <&mmcc CAMSS_VFE1_AHB_CLK>, + <&mmcc CAMSS_VFE1_STREAM_CLK>, + <&mmcc CAMSS_VFE_AHB_CLK>, + <&mmcc CAMSS_VFE_AXI_CLK>; + clock-names = "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csiphy2_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csi3_ahb", + "csi3", + "csi3_phy", + "csi3_pix", + "csi3_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe0_ahb", + "vfe0_stream", + "vfe1", + "csi_vfe1", + "vfe1_ahb", + "vfe1_stream", + "vfe_ahb", + "vfe_axi"; + vdda-supply = <&pm8994_l2>; + iommus = <&vfe_smmu 0>, + <&vfe_smmu 1>, + <&vfe_smmu 2>, + <&vfe_smmu 3>; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + agnoc@0 { power-domains = <&gcc AGGRE0_NOC_GDSC>; compatible = "simple-pm-bus";