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[209.132.180.67]) by mx.google.com with ESMTP id y40-v6si47366756pla.391.2018.11.20.19.38.04; Tue, 20 Nov 2018 19:38:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W6Fdv0y4; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726947AbeKUOKh (ORCPT + 2 others); Wed, 21 Nov 2018 09:10:37 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:43995 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726406AbeKUOKh (ORCPT ); Wed, 21 Nov 2018 09:10:37 -0500 Received: by mail-pl1-f195.google.com with SMTP id gn14so3380771plb.10 for ; Tue, 20 Nov 2018 19:38:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wRzyWtQem/ZudNzb9RZbtf1aGt6UbjSssLp+q/Rsb70=; b=W6Fdv0y4dpDrEI7W3bcMcFFwDrafrf8k0lK+uOJ+jLA1327RGVnlS1bFbp89uBFLW8 Fn+UjhyF0RfO6E5H8x8xXxa/Mv+eKKgWOL9IpMRNNGdv44C2P3n/I8mlTXdHKqK50CRw Ap+pgLHhm4+jM9lSDXGqdj0R+QjC5xtwGVvAw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wRzyWtQem/ZudNzb9RZbtf1aGt6UbjSssLp+q/Rsb70=; b=Dr+0pMsQM+xqjtq3nYrHrxLBfItNWe4mi6SeLjJEkKH1vvzT6/oEb7RuhLY6BX0ol7 JAlg8V1tTBW5yIHLeIQpp0MZKClH6AK3+F7DiRyOZvFk6SJVWVl+ME+HRsHwoPcJecLJ dqrdOFV4i7u0s0n/b33VGS1r8x8+/Ee5rQChA0IOPPwkoW926ymodiCytHVv40pjsfB4 0eyTzEwndX2DZgByoORtN9FWNtxjopwzTQB1PmtzwHgno1g2oqZQm2Q3+pJG0BC8iN16 2PIZ9B0icUlOplR4H3h8ie5EbBpab4FZ2ToS97YI9D1QDi5K2NzwiKuWgJLD+3MV+9/E Fknw== X-Gm-Message-State: AA+aEWbVwRo8GS1Jcy7sYdAaw9uPRVv59mkg1gvWn7KWzodjvn5ex84u /DRPPsbMDucljq2CDPTGWW6w X-Received: by 2002:a63:1444:: with SMTP id 4mr4447921pgu.430.1542771483254; Tue, 20 Nov 2018 19:38:03 -0800 (PST) Received: from localhost.localdomain ([2409:4072:98b:9501:106a:f751:df0d:9e68]) by smtp.gmail.com with ESMTPSA id z8sm72025095pgz.53.2018.11.20.19.37.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 19:38:02 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, overseas.sales@unisoc.com, Manivannan Sadhasivam Subject: [PATCH v2 05/15] arm: dts: Add devicetree for RDA8810PL SoC Date: Wed, 21 Nov 2018 09:06:42 +0530 Message-Id: <20181121033652.12247-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181121033652.12247-1-manivannan.sadhasivam@linaro.org> References: <20181121033652.12247-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add initial device tree for RDA8810PL SoC from RDA Microelectronics. Signed-off-by: Andreas Färber Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/rda8810pl.dtsi | 86 ++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi -- 2.17.1 diff --git a/arch/arm/boot/dts/rda8810pl.dtsi b/arch/arm/boot/dts/rda8810pl.dtsi new file mode 100644 index 000000000000..ab85ee06d84f --- /dev/null +++ b/arch/arm/boot/dts/rda8810pl.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * RDA8810PL SoC + * + * Copyright (c) 2017 Andreas Färber + * Copyright (c) 2018 Manivannan Sadhasivam + */ + +/ { + compatible = "rda,8810pl"; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + }; + }; + + sram@100000 { + compatible = "mmio-sram"; + reg = <0x100000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + }; + + apb@20800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20800000 0x100000>; + + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + apb@20900000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20900000 0x100000>; + }; + + apb@20a00000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20a00000 0x100000>; + + uart0: serial@0 { + compatible = "rda,8810pl-uart"; + reg = <0x0 0x1000>; + status = "disabled"; + }; + + uart1: serial@10000 { + compatible = "rda,8810pl-uart"; + reg = <0x10000 0x1000>; + status = "disabled"; + }; + + uart2: serial@90000 { + compatible = "rda,8810pl-uart"; + reg = <0x90000 0x1000>; + status = "disabled"; + }; + }; + + l2: cache-controller@21100000 { + compatible = "arm,pl310-cache"; + reg = <0x21100000 0x1000>; + cache-unified; + cache-level = <2>; + }; +};