diff mbox series

[Xen-devel,for-4.12,2/8] xen/arm: p2m: Provide an helper to generate the VTTBR

Message ID 20181128164939.8329-3-julien.grall@arm.com
State Superseded
Headers show
Series xen/arm: Workaround for Cortex-A76 erratum 1165522 | expand

Commit Message

Julien Grall Nov. 28, 2018, 4:49 p.m. UTC
A follow-up patch will need to generate the VTTBR in a few places.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/p2m.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Andrii Anisov Dec. 21, 2018, 2:34 p.m. UTC | #1
On 28.11.18 18:49, Julien Grall wrote:
> A follow-up patch will need to generate the VTTBR in a few places.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
>   xen/arch/arm/p2m.c | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
Stefano Stabellini Jan. 23, 2019, 11:27 p.m. UTC | #2
On Wed, 28 Nov 2018, Julien Grall wrote:
> A follow-up patch will need to generate the VTTBR in a few places.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
>  xen/arch/arm/p2m.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
> index 6c76298ebc..8ebf1e8dba 100644
> --- a/xen/arch/arm/p2m.c
> +++ b/xen/arch/arm/p2m.c
> @@ -47,6 +47,11 @@ static const paddr_t level_masks[] =
>  static const uint8_t level_orders[] =
>      { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER };
>  
> +static uint64_t generate_vttbr(uint16_t vmid, mfn_t root_mfn)
> +{
> +    return (mfn_to_maddr(root_mfn) | ((uint64_t)vmid << 48));

Outer brackets are not necessary. Regardless:

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


> +}
> +
>  /* Unlock the flush and do a P2M TLB flush if necessary */
>  void p2m_write_unlock(struct p2m_domain *p2m)
>  {
> @@ -1147,7 +1152,7 @@ static int p2m_alloc_table(struct domain *d)
>  
>      p2m->root = page;
>  
> -    p2m->vttbr = page_to_maddr(p2m->root) | ((uint64_t)p2m->vmid << 48);
> +    p2m->vttbr = generate_vttbr(p2m->vmid, page_to_mfn(p2m->root));
>  
>      /*
>       * Make sure that all TLBs corresponding to the new VMID are flushed
> -- 
> 2.11.0
>
Julien Grall Jan. 24, 2019, 11:06 a.m. UTC | #3
Hi Stefano,

On 23/01/2019 23:27, Stefano Stabellini wrote:
> On Wed, 28 Nov 2018, Julien Grall wrote:
>> A follow-up patch will need to generate the VTTBR in a few places.
>>
>> Signed-off-by: Julien Grall <julien.grall@arm.com>
>> ---
>>   xen/arch/arm/p2m.c | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
>> index 6c76298ebc..8ebf1e8dba 100644
>> --- a/xen/arch/arm/p2m.c
>> +++ b/xen/arch/arm/p2m.c
>> @@ -47,6 +47,11 @@ static const paddr_t level_masks[] =
>>   static const uint8_t level_orders[] =
>>       { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER };
>>   
>> +static uint64_t generate_vttbr(uint16_t vmid, mfn_t root_mfn)
>> +{
>> +    return (mfn_to_maddr(root_mfn) | ((uint64_t)vmid << 48));
> 
> Outer brackets are not necessary. Regardless:

I would prefer to keep them here.

> 
> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

Thank you!

Cheers,
diff mbox series

Patch

diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 6c76298ebc..8ebf1e8dba 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -47,6 +47,11 @@  static const paddr_t level_masks[] =
 static const uint8_t level_orders[] =
     { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER };
 
+static uint64_t generate_vttbr(uint16_t vmid, mfn_t root_mfn)
+{
+    return (mfn_to_maddr(root_mfn) | ((uint64_t)vmid << 48));
+}
+
 /* Unlock the flush and do a P2M TLB flush if necessary */
 void p2m_write_unlock(struct p2m_domain *p2m)
 {
@@ -1147,7 +1152,7 @@  static int p2m_alloc_table(struct domain *d)
 
     p2m->root = page;
 
-    p2m->vttbr = page_to_maddr(p2m->root) | ((uint64_t)p2m->vmid << 48);
+    p2m->vttbr = generate_vttbr(p2m->vmid, page_to_mfn(p2m->root));
 
     /*
      * Make sure that all TLBs corresponding to the new VMID are flushed