@@ -58,8 +58,6 @@
[Pcd]
gAmdStyxTokenSpaceGuid.PcdSocCoreCount
gAmdStyxTokenSpaceGuid.PcdSocCpuId
- gAmdStyxTokenSpaceGuid.PcdEthMacA
- gAmdStyxTokenSpaceGuid.PcdEthMacB
[FixedPcd]
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
@@ -29,6 +29,7 @@
[Sources]
AcpiPlatform.c
SsdtB1.asl
+ SsdtXgbe.asl
[Packages]
ArmPkg/ArmPkg.dec
@@ -39,6 +40,8 @@
[LibraryClasses]
AmdStyxAcpiLib
+ BaseLib
+ BaseMemoryLib
DebugLib
DxeServicesLib
MemoryAllocationLib
@@ -47,6 +50,8 @@
UefiDriverEntryPoint
[Pcd]
+ gAmdStyxTokenSpaceGuid.PcdEthMacA
+ gAmdStyxTokenSpaceGuid.PcdEthMacB
gAmdStyxTokenSpaceGuid.PcdEnableSmmus
gAmdStyxTokenSpaceGuid.PcdSocCpuId
@@ -15,139 +15,12 @@
**/
#include <AmdStyxAcpiLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
#include <Dsdt.hex>
-#include <Dsdt.offset.h>
-
-
-UINTN
-ShiftLeftByteToUlong (
- IN UINT8 Byte,
- IN UINTN Shift
- )
-{
- UINTN Data;
-
- Data = (UINTN)Byte;
- Data <<= Shift;
- return Data;
-}
-
-UINTN
-AmlGetPkgLength (
- IN UINT8 *Buffer,
- OUT UINTN *PkgLength
- )
-{
- UINTN Bytes, Length;
-
- Bytes = (UINTN)((Buffer[0] >> 6) & 0x3) + 1;
- switch (Bytes) {
- case 1:
- Length = (UINTN)Buffer[0];
- break;
-
- case 2:
- Length = ShiftLeftByteToUlong(Buffer[1], 4) +
- (UINTN)(Buffer[0] & 0x0F);
- break;
-
- case 3:
- Length = ShiftLeftByteToUlong(Buffer[2], 12) +
- ShiftLeftByteToUlong(Buffer[1], 4) +
- (UINTN)(Buffer[0] & 0x0F);
- break;
-
- default: /* 4 bytes */
- Length = ShiftLeftByteToUlong(Buffer[3], 20) +
- ShiftLeftByteToUlong(Buffer[2], 12) +
- ShiftLeftByteToUlong(Buffer[1], 4) +
- (UINTN)(Buffer[0] & 0x0F);
- break;
- }
-
- *PkgLength = Length;
- return Bytes;
-}
-
-UINT8 *
-AmlSearchStringPackage (
- IN UINT8 *Buffer,
- IN UINTN Length,
- IN CHAR8 *String
- )
-{
- UINTN StrLength;
-
- StrLength = AsciiStrLen (String) + 1;
- if (Length > StrLength ) {
- Length -= StrLength;
- while (AsciiStrCmp((CHAR8 *)Buffer, String) != 0 && Length) {
- --Length;
- ++Buffer;
- }
- if (Length) {
- return &Buffer[StrLength];
- }
- }
- return NULL;
-}
-
-VOID
-OverrideMacAddr (
- IN UINT8 *DSD_Data,
- IN UINT64 MacAddr
- )
-{
- UINT8 *MacAddrPkg;
- UINTN Bytes, Length, Index = 0;
-
- // AML encoding: PackageOp
- if (DSD_Data[0] == 0x12) {
- // AML encoding: PkgLength
- Bytes = AmlGetPkgLength (&DSD_Data[1], &Length);
-
- // Search for "mac-address" property
- MacAddrPkg = AmlSearchStringPackage (&DSD_Data[Bytes + 1],
- Length - Bytes,
- "mac-address");
- if (MacAddrPkg &&
- MacAddrPkg[0] == 0x12 && // PackageOp
- MacAddrPkg[1] == 0x0E && // PkgLength
- MacAddrPkg[2] == 0x06) { // NumElements (element must have a BytePrefix)
-
- MacAddrPkg += 3;
- do {
- MacAddrPkg[0] = 0x0A; // BytePrefix
- MacAddrPkg[1] = (UINT8)(MacAddr & 0xFF);
- MacAddrPkg += 2;
- MacAddr >>= 8;
- } while (++Index < 6);
- }
- }
-}
EFI_ACPI_DESCRIPTION_HEADER *
DsdtHeader (
VOID
)
{
- AML_OFFSET_TABLE_ENTRY *Table;
-
- Table = &DSDT_SEATTLE__OffsetTable[0];
- while (Table->Pathname) {
- if (AsciiStrCmp(Table->Pathname, "_SB_.ETH0._DSD") == 0) {
- OverrideMacAddr ((UINT8 *)&AmlCode[Table->Offset], PcdGet64 (PcdEthMacA));
- }
- else if (AsciiStrCmp(Table->Pathname, "_SB_.ETH1._DSD") == 0) {
- OverrideMacAddr ((UINT8 *)&AmlCode[Table->Offset], PcdGet64 (PcdEthMacB));
- }
-
- ++Table;
- }
-
return (EFI_ACPI_DESCRIPTION_HEADER *) &AmlCode[0];
}
@@ -22,6 +22,7 @@
#include <AmdStyxAcpiLib.h>
#include <Protocol/AcpiTable.h>
+#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/DxeServicesLib.h>
@@ -39,6 +40,57 @@ EFI_ACPI_DESCRIPTION_HEADER *AcpiTableList[MAX_ACPI_TABLES];
STATIC EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol;
+#if DO_XGBE
+
+STATIC CONST UINT8 mDefaultMacPackageA[] = {
+ 0x12, 0xe, 0x6, 0xa, 0x2, 0xa, 0xa1, 0xa, 0xa2, 0xa, 0xa3, 0xa, 0xa4, 0xa, 0xa5
+};
+
+STATIC CONST UINT8 mDefaultMacPackageB[] = {
+ 0x12, 0xe, 0x6, 0xa, 0x2, 0xa, 0xb1, 0xa, 0xb2, 0xa, 0xb3, 0xa, 0xb4, 0xa, 0xb5
+};
+
+#define PACKAGE_MAC_OFFSET 4
+#define PACKAGE_MAC_INCR 2
+
+STATIC
+VOID
+SetPackageAddress (
+ UINT8 *Package,
+ UINT64 MacAddress,
+ UINTN Size
+ )
+{
+ UINTN Index;
+
+ for (Index = PACKAGE_MAC_OFFSET; Index < Size; Index += PACKAGE_MAC_INCR) {
+ Package[Index] = (UINT8)MacAddress;
+ MacAddress >>= 8;
+ }
+}
+
+STATIC
+VOID
+PatchAmlPackage (
+ CONST UINT8 *Pattern,
+ CONST UINT8 *Replacement,
+ UINTN PatternLength,
+ UINT8 *SsdtTable,
+ UINTN TableSize
+ )
+{
+ UINTN Offset;
+
+ for (Offset = 0; Offset < (TableSize - PatternLength); Offset++) {
+ if (CompareMem (SsdtTable + Offset, Pattern, PatternLength) == 0) {
+ CopyMem (SsdtTable + Offset, Replacement, PatternLength);
+ break;
+ }
+ }
+}
+
+#endif
+
STATIC
VOID
InstallSystemDescriptionTables (
@@ -51,6 +103,9 @@ InstallSystemDescriptionTables (
UINTN Index;
UINTN TableSize;
UINTN TableHandle;
+#if DO_XGBE
+ UINT8 MacPackage[sizeof(mDefaultMacPackageA)];
+#endif
Status = EFI_SUCCESS;
for (Index = 0; !EFI_ERROR (Status); Index++) {
@@ -67,6 +122,25 @@ InstallSystemDescriptionTables (
continue;
}
break;
+
+ case SIGNATURE_64 ('S', 't', 'y', 'x', 'X', 'g', 'b', 'e'):
+#if DO_XGBE
+ //
+ // Patch the SSDT binary with the correct MAC addresses
+ //
+ CopyMem (MacPackage, mDefaultMacPackageA, sizeof (MacPackage));
+
+ SetPackageAddress (MacPackage, PcdGet64 (PcdEthMacA), sizeof (MacPackage));
+ PatchAmlPackage (mDefaultMacPackageA, MacPackage, sizeof (MacPackage),
+ (UINT8 *)Table, TableSize);
+
+ SetPackageAddress (MacPackage, PcdGet64 (PcdEthMacB), sizeof (MacPackage));
+ PatchAmlPackage (mDefaultMacPackageB, MacPackage, sizeof (MacPackage),
+ (UINT8 *)Table, TableSize);
+
+ break;
+#endif
+ continue;
}
Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, Table,
@@ -105,119 +105,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3)
})
}
-#if DO_XGBE
- Device (ETH0)
- {
- Name (_HID, "AMDI8001") // _HID: Hardware ID
- Name (_UID, 0x00) // _UID: Unique ID
- Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
-
- {
- Memory32Fixed (ReadWrite,
- 0xE0700000, // Address Base (XGMAC)
- 0x00010000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE0780000, // Address Base (XPCS)
- 0x00080000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE1240800, // Address Base (SERDES_RxTx)
- 0x00000400, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE1250000, // Address Base (SERDES_IR_1)
- 0x00000060, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE12500F8, // Address Base (SERDES_IR_2)
- 0x00000004, // Address Length
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000165, } // XGMAC
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017A, } // DMA0
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017B, } // DMA1
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017C, } // DMA2
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017D, } // DMA3
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000163, } // XPCS
- })
- Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
- {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package ()
- {
- Package (0x02) {"mac-address", Package (0x06) {0x02, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5}},
- Package (0x02) {"phy-mode", "xgmii"},
- Package (0x02) {"amd,speed-set", 0x00},
- Package (0x02) {"amd,dma-freq", 0x0EE6B280},
- Package (0x02) {"amd,ptp-freq", 0x0EE6B280},
- Package (0x02) {"amd,serdes-blwc", Package (0x03) {1, 1, 0}},
- Package (0x02) {"amd,serdes-cdr-rate", Package (0x03) {2, 2, 7}},
- Package (0x02) {"amd,serdes-pq-skew", Package (0x03) {10, 10, 18}},
- Package (0x02) {"amd,serdes-tx-amp", Package (0x03) {15, 15, 10}},
- Package (0x02) {"amd,serdes-dfe-tap-config", Package (0x03) {3, 3, 1}},
- Package (0x02) {"amd,serdes-dfe-tap-enable", Package (0x03) {0, 0, 127}},
- Package (0x02) {"amd,per-channel-interrupt", 0x01}
- }
- })
- }
-
- Device (ETH1)
- {
- Name (_HID, "AMDI8001") // _HID: Hardware ID
- Name (_UID, 0x01) // _UID: Unique ID
- Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0xE0900000, // Address Base (XGMAC)
- 0x00010000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE0980000, // Address Base (XPCS)
- 0x00080000, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE1240C00, // Address Base (SERDES_RxTx)
- 0x00000400, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE1250080, // Address Base (SERDES_IR_1)
- 0x00000060, // Address Length
- )
- Memory32Fixed (ReadWrite,
- 0xE12500FC, // Address Base (SERDES_IR_2)
- 0x00000004, // Address Length
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000164, } // XGMAC
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000175, } // DMA0
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000176, } // DMA1
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000177, } // DMA2
- Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000178, } // DMA3
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000162, } // XPCS
- })
- Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
- {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package ()
- {
- Package (0x02) {"mac-address", Package (0x06) {0x02, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5}},
- Package (0x02) {"phy-mode", "xgmii"},
- Package (0x02) {"amd,speed-set", 0x00},
- Package (0x02) {"amd,dma-freq", 0x0EE6B280},
- Package (0x02) {"amd,ptp-freq", 0x0EE6B280},
- Package (0x02) {"amd,serdes-blwc", Package (0x03) {1, 1, 0}},
- Package (0x02) {"amd,serdes-cdr-rate", Package (0x03) {2, 2, 7}},
- Package (0x02) {"amd,serdes-pq-skew", Package (0x03) {10, 10, 18}},
- Package (0x02) {"amd,serdes-tx-amp", Package (0x03) {15, 15, 10}},
- Package (0x02) {"amd,serdes-dfe-tap-config", Package (0x03) {3, 3, 1}},
- Package (0x02) {"amd,serdes-dfe-tap-enable", Package (0x03) {0, 0, 127}},
- Package (0x02) {"amd,per-channel-interrupt", 0x01}
- }
- })
- }
-#endif // DO_XGBE
-
Device (SPI0)
{
Name (_HID, "AMDI0500") // _HID: Hardware ID
new file mode 100644
@@ -0,0 +1,135 @@
+/** @file
+
+ SSDT for 10GbE network controllers
+
+ Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2014 - 2016, AMD Inc. All rights reserved.<BR>
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+DefinitionBlock ("SsdtXgbe.aml", "SSDT", 2, "AMDINC", "StyxXgbe", 3)
+{
+ Scope (_SB)
+ {
+ Device (ETH0)
+ {
+ Name (_HID, "AMDI8001") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+
+ {
+ Memory32Fixed (ReadWrite,
+ 0xE0700000, // Address Base (XGMAC)
+ 0x00010000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE0780000, // Address Base (XPCS)
+ 0x00080000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE1240800, // Address Base (SERDES_RxTx)
+ 0x00000400, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE1250000, // Address Base (SERDES_IR_1)
+ 0x00000060, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE12500F8, // Address Base (SERDES_IR_2)
+ 0x00000004, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000165, } // XGMAC
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017A, } // DMA0
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017B, } // DMA1
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017C, } // DMA2
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x0000017D, } // DMA3
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000163, } // XPCS
+ })
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
+ {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package ()
+ {
+ Package (0x02) {"mac-address", Package (0x06) {0x02, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5}},
+ Package (0x02) {"phy-mode", "xgmii"},
+ Package (0x02) {"amd,speed-set", 0x00},
+ Package (0x02) {"amd,dma-freq", 0x0EE6B280},
+ Package (0x02) {"amd,ptp-freq", 0x0EE6B280},
+ Package (0x02) {"amd,serdes-blwc", Package (0x03) {1, 1, 0}},
+ Package (0x02) {"amd,serdes-cdr-rate", Package (0x03) {2, 2, 7}},
+ Package (0x02) {"amd,serdes-pq-skew", Package (0x03) {10, 10, 18}},
+ Package (0x02) {"amd,serdes-tx-amp", Package (0x03) {15, 15, 10}},
+ Package (0x02) {"amd,serdes-dfe-tap-config", Package (0x03) {3, 3, 1}},
+ Package (0x02) {"amd,serdes-dfe-tap-enable", Package (0x03) {0, 0, 127}},
+ Package (0x02) {"amd,per-channel-interrupt", 0x01}
+ }
+ })
+ }
+
+ Device (ETH1)
+ {
+ Name (_HID, "AMDI8001") // _HID: Hardware ID
+ Name (_UID, 0x01) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xE0900000, // Address Base (XGMAC)
+ 0x00010000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE0980000, // Address Base (XPCS)
+ 0x00080000, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE1240C00, // Address Base (SERDES_RxTx)
+ 0x00000400, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE1250080, // Address Base (SERDES_IR_1)
+ 0x00000060, // Address Length
+ )
+ Memory32Fixed (ReadWrite,
+ 0xE12500FC, // Address Base (SERDES_IR_2)
+ 0x00000004, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000164, } // XGMAC
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000175, } // DMA0
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000176, } // DMA1
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000177, } // DMA2
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, ) {0x00000178, } // DMA3
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x00000162, } // XPCS
+ })
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
+ {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package ()
+ {
+ Package (0x02) {"mac-address", Package (0x06) {0x02, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5}},
+ Package (0x02) {"phy-mode", "xgmii"},
+ Package (0x02) {"amd,speed-set", 0x00},
+ Package (0x02) {"amd,dma-freq", 0x0EE6B280},
+ Package (0x02) {"amd,ptp-freq", 0x0EE6B280},
+ Package (0x02) {"amd,serdes-blwc", Package (0x03) {1, 1, 0}},
+ Package (0x02) {"amd,serdes-cdr-rate", Package (0x03) {2, 2, 7}},
+ Package (0x02) {"amd,serdes-pq-skew", Package (0x03) {10, 10, 18}},
+ Package (0x02) {"amd,serdes-tx-amp", Package (0x03) {15, 15, 10}},
+ Package (0x02) {"amd,serdes-dfe-tap-config", Package (0x03) {3, 3, 1}},
+ Package (0x02) {"amd,serdes-dfe-tap-enable", Package (0x03) {0, 0, 127}},
+ Package (0x02) {"amd,per-channel-interrupt", 0x01}
+ }
+ })
+ }
+ }
+}
+
Move the XGBE out of the DSDT, and along with it the logic that patches the correct MAC address into the device nodes. However, this time we patch the SSDT binary directly rather than relying on intermediate output of an outdated version of the iasl compiler. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 2 - Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 + Silicon/AMD/Styx/AcpiTables/Dsdt.c | 127 ------------------ Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 74 +++++++++++ Silicon/AMD/Styx/AcpiTables/Dsdt.asl | 113 ---------------- Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/SsdtXgbe.asl | 135 ++++++++++++++++++++ 6 files changed, 214 insertions(+), 242 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel