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[198.145.21.10]) by mx.google.com with ESMTPS id x9si12608582pgh.12.2018.12.11.10.35.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Dec 2018 10:35:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Ukarnqxr; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4E3B72194D3AE; Tue, 11 Dec 2018 10:35:35 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::341; helo=mail-wm1-x341.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0066D2119A457 for ; Tue, 11 Dec 2018 10:35:32 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id m22so3374858wml.3 for ; Tue, 11 Dec 2018 10:35:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UPwdZhmucUBGeW/AbJHbWjdABBsP46M4XFEjQ3zMJ4k=; b=Ukarnqxrcb7DgW4At61qztWZAT5e1Q/GFNjHqU7X8ZJoCIXTBxzeTfGbNihRFfkthr HS2GzOVxl8LGr274aBy+BwuCTI2XJ39tcD8/icDT1ykzjP7GDZXufcSRYifMJ8UYCmZy EthIHl0LKPLCrFFF+iftn8JHh9rR4xa2WoZzQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UPwdZhmucUBGeW/AbJHbWjdABBsP46M4XFEjQ3zMJ4k=; b=Q71mU9mc8hlOKnyvtia1PnQ/+ydKViPHHebuDTqwrm44zLqQ1hP9nAfYsqOYY/Pvex DsyEk91k1wYENqXzU+ijBd/ixUQI+56J12QE8uGfXoYeVlyWqajMO45dzIw6j4PbFwKl rFr9jfD90OdQTxDmUstgFRDVAEBwUfVJJa/vUVgcKF+AFOLY6KQxNJ6XtZoMkv5YRMiC YTzgCG+v51B3FaW9A/tyzZCx4qBX/nC8DrnsAK6hkBgxKoG0wm3Loa2HRVGirqMW5ArG RgokMXHnOac4R41eZfeAuoExDABDfvledk3PYM+ecuKagCAgjDDaHzExFyfZCLnbEYN2 8Ecg== X-Gm-Message-State: AA+aEWbiyKk+xYmE3jv+oCugXnAgQtiPNHUDLf653/xFJsUG4AG0glnr VN3ljWbIj9ktYcBX8R9syiZbLoLoUMXRMw== X-Received: by 2002:a1c:448a:: with SMTP id r132mr3318127wma.47.1544553331272; Tue, 11 Dec 2018 10:35:31 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:8c3:6b9d:cbc9:58c6]) by smtp.gmail.com with ESMTPSA id h131sm1026688wmd.17.2018.12.11.10.35.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Dec 2018 10:35:30 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 11 Dec 2018 19:35:10 +0100 Message-Id: <20181211183514.20948-8-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181211183514.20948-1-ard.biesheuvel@linaro.org> References: <20181211183514.20948-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [PATCH edk2-platforms 07/11] Silicon/AMD/Styx: introduce boolean PCD for KCS/IPMI support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alan@softiron.co.uk Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In order to get rid of another CPP macro, introduce a boolean PCD that we will set in the platform to enable IPMI/KCS support. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/AMD/Styx/AmdStyx.dec | 1 + Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 2 ++ Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ 3 files changed, 5 insertions(+) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec index c2e691cb5ea4..dedc15565984 100644 --- a/Silicon/AMD/Styx/AmdStyx.dec +++ b/Silicon/AMD/Styx/AmdStyx.dec @@ -103,3 +103,4 @@ [PcdsFixedAtBuild,PcdsDynamic] gAmdStyxTokenSpaceGuid.PcdEnableSmmus|FALSE|BOOLEAN|0xe0000000 + gAmdStyxTokenSpaceGuid.PcdEnableKcs|FALSE|BOOLEAN|0xe0000001 diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc index fb524cfc5490..17c936be5085 100644 --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc @@ -462,6 +462,8 @@ DEFINE DO_CAPSULE = FALSE # map the stack as non-executable when entering the DXE phase gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + gAmdStyxTokenSpaceGuid.PcdEnableKcs|TRUE + gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE gAmdModulePkgTokenSpaceGuid.PcdXgbeEnable|TRUE diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc index 5264346a375c..d7eb5f87afa1 100644 --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc @@ -429,6 +429,8 @@ DEFINE DO_FLASHER = FALSE # map the stack as non-executable when entering the DXE phase gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + gAmdStyxTokenSpaceGuid.PcdEnableKcs|TRUE + [PcdsPatchableInModule] # PCIe Configuration: x4x2x2 (=2 See Include/FDKGionb.h) gAmdModulePkgTokenSpaceGuid.PcdPcieCoreConfiguration|2