From patchwork Mon Dec 17 16:04:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 154006 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2632343ljp; Mon, 17 Dec 2018 08:04:54 -0800 (PST) X-Google-Smtp-Source: AFSGD/W8SWXpCk7RcntbhNJOmXDfvHs77v6CSfOEkkB5o5GFLWrsAsOr+wCG591W/CzYEltyyT4T X-Received: by 2002:a63:f844:: with SMTP id v4mr9327520pgj.82.1545062694020; Mon, 17 Dec 2018 08:04:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545062694; cv=none; d=google.com; s=arc-20160816; b=HR0q5FKbgwKyPpi9ctj5kaU8+E+f67tq2jQUbi0I/YsMNyZjinu56G+d1GEOXPqR2O tzsz8BKSdfCk83szxS2X55z/9uOFGUYe9K8B+zXHKyYND1hdxk4FzEF8Iihu0vflPzRI ehMioYcavHgvVXl1lcfbVxQzpE1ZDrxAmcmyTaVhlYxjLzJUeywySinJ41WBVxi+K6ax 86r1kG4TYvHPRbNDMaV7yyVxcXWM7eZR/+4hzukBTBOBPxXFgzoV4f4iSli5bE0jFWjZ Y/nGvqwlvFtlKC1zF1NljQT77q/oqjQdDS37L5JIvU4ULUpYa5VUGOFTIxofpsotQeJ6 skfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:date:message-id:openpgp:subject:from:cc:to :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=KXobAxAC/77U8kTAk2d7zAocIJlgcxQ7zAWYUYxgceI=; b=zQdQ2AfS7pBYLIFC//wc21dO7puduNBpDkJb27DClO3r8FGNulcWNeLJHbz7Bq5ZJp aI6DgZGxpLvPzenMmGbLw8XRuBXomWNHAcjEGISq1SExPyhdxugMQAG/OLufmQ3CkDXb 76d5tdihyXeOM1zlZlR8LPXv8YF8xhVlp1hhr6f1n8/ypbqbFc/+Cbv4qGm4hILXLF3R YCZfRxrKBx8XvNkKioR+1t0d3UbfEeJKFWrQTeUCap2li6g7nWcUlicyPG4fArs4OTaa ku6RBo5H5xsPxoEdh/3tx5FGSPsjSt9GnsJrZalZPVBpMzBJqO1kDNDnukIoRMeLorhI RFPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="dGTF1ne/"; spf=pass (google.com: domain of gcc-patches-return-492657-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-492657-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id v69si11281233pgb.3.2018.12.17.08.04.53 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Dec 2018 08:04:54 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-492657-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="dGTF1ne/"; spf=pass (google.com: domain of gcc-patches-return-492657-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-492657-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=Xw1DOKiD74guc30FzYXpfVe0NBsNYQxGGovpLf0+HWuSlx2k/y IXnWqV8NbCQiI3nM/PFkU6lhU15n9YBolLmv+mb5edLZyMOqq2TM385xVbHvnrxo W2DyJRBuQyP0SLK2Bs1CRo0XLIFn66veNeYypjRqWLzvg4niZxR9zktEM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:message-id:date:mime-version:content-type; s= default; bh=5yMgaqOv3qXrPnOqlYeKRx/kh6U=; b=dGTF1ne/a8XCLd3cHEDk q/sdyjLJeDXQ681vOFS2V26jjfr2rSMXrlyv8/yKlK/xHOGytTiq//E8HD4jxrxo Qnb2EOwU2AOJwehJlsduM6Vy4e+1Ns/jS9+w75im96xaGUhhq+3KB9pnYb/zcsp5 gd1y69iltr7UqETCydXKpNk= Received: (qmail 122436 invoked by alias); 17 Dec 2018 16:04:42 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 122416 invoked by uid 89); 17 Dec 2018 16:04:41 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy=await, regs, fntype X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 17 Dec 2018 16:04:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 663A2A78; Mon, 17 Dec 2018 08:04:37 -0800 (PST) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.231]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E2093F575; Mon, 17 Dec 2018 08:04:36 -0800 (PST) To: gcc-patches Cc: jakub@redhat.com, Richard Biener From: "Richard Earnshaw (lists)" Subject: [arm][RFC] PR target/88469 fix incorrect argument passing with 64-bit bitfields Openpgp: preference=signencrypt Message-ID: Date: Mon, 17 Dec 2018 16:04:32 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 Unfortunately another PCS bug has come to light with the layout of structs whose alignment is dominated by a 64-bit bitfield element. Such fields in the type list appear to have alignment 1, but in reality, for the purposes of alignment of the underlying structure, the alignment is derived from the underlying bitfield's type. We've been getting this wrong since support for over-aligned record types was added several releases back. Worse still, the existing code may generate unaligned memory accesses that may fault on some versions of the architecture. I'd appreciate a comment from someone with a bit more knowledge of record layout - the code in stor-layout.c looks hideously complex when it comes to bit-field layout; but it's quite possible that all of that is irrelevant on Arm. PR target/88469 * config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's alignment is dominated by a bitfield with 64-bit aligned base type. (arm_function_arg): Emit a warning if the alignment has changed since earlier GCC releases. (arm_function_arg_boundary): Likewise. (arm_setup_incoming_varargs): Likewise. * testsuite/gcc.target/arm/aapcs/bitfield1.c: New test. I'm not committing this yet, as I'll await comments as to whether folks think this is sufficient. R. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 40f0574e32e..5f5269c71c9 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -6589,7 +6589,9 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype, } } -/* Return 1 if double word alignment is required for argument passing. +/* Return 2 if double word alignment is required for argument passing, + but wasn't required before the fix for PR88469. + Return 1 if double word alignment is required for argument passing. Return -1 if double word alignment used to be required for argument passing before PR77728 ABI fix, but is not required anymore. Return 0 if double word alignment is not required and wasn't requried @@ -6609,7 +6611,8 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type) return TYPE_ALIGN (TREE_TYPE (type)) > PARM_BOUNDARY; int ret = 0; - /* Record/aggregate types: Use greatest member alignment of any member. */ + int ret2 = 0; + /* Record/aggregate types: Use greatest member alignment of any member. */ for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) if (DECL_ALIGN (field) > PARM_BOUNDARY) { @@ -6621,6 +6624,13 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type) Make sure we can warn about that with -Wpsabi. */ ret = -1; } + else if (TREE_CODE (field) == FIELD_DECL + && DECL_BIT_FIELD (field) + && TYPE_ALIGN (DECL_BIT_FIELD_TYPE (field)) > PARM_BOUNDARY) + ret2 = 1; + + if (ret2) + return 2; return ret; } @@ -6686,7 +6696,12 @@ arm_function_arg (cumulative_args_t pcum_v, machine_mode mode, inform (input_location, "parameter passing for argument of type " "%qT changed in GCC 7.1", type); else if (res > 0) - pcum->nregs++; + { + pcum->nregs++; + if (res > 1 && warn_psabi) + inform (input_location, "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); + } } /* Only allow splitting an arg between regs and memory if all preceding @@ -6713,6 +6728,9 @@ arm_function_arg_boundary (machine_mode mode, const_tree type) if (res < 0 && warn_psabi) inform (input_location, "parameter passing for argument of type %qT " "changed in GCC 7.1", type); + if (res > 1 && warn_psabi) + inform (input_location, "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); return res > 0 ? DOUBLEWORD_ALIGNMENT : PARM_BOUNDARY; } @@ -26953,7 +26971,13 @@ arm_setup_incoming_varargs (cumulative_args_t pcum_v, inform (input_location, "parameter passing for argument of " "type %qT changed in GCC 7.1", type); else if (res > 0) - nregs++; + { + nregs++; + if (res > 1 && warn_psabi) + inform (input_location, + "parameter passing for argument of type " + "%qT changed in GCC 9.1", type); + } } } else diff --git a/gcc/testsuite/gcc.target/arm/aapcs/bitfield1.c b/gcc/testsuite/gcc.target/arm/aapcs/bitfield1.c new file mode 100644 index 00000000000..7d8b7065484 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/aapcs/bitfield1.c @@ -0,0 +1,23 @@ +/* Test AAPCS layout (alignment). */ + +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-options "-O" } */ + +#ifndef IN_FRAMEWORK +#define TESTFILE "bitfield1.c" + +struct bf +{ + unsigned long long a: 61; + unsigned b: 3; +} v = {1, 1}; + +#include "abitest.h" +#else + ARG (int, 7, R0) + /* Attribute suggests R2, but we should use only natural alignment: */ + ARG (int, 9, R1) + ARG (int, 11, R2) + LAST_ARG (struct bf, v, STACK) +#endif