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[81.169.180.215]) by mx.google.com with ESMTP id h1-v6si2301553ejk.295.2018.12.27.05.35.30; Thu, 27 Dec 2018 05:35:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=McU3kb3C; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.denx.de (Postfix, from userid 105) id CBB73C21DDC; Thu, 27 Dec 2018 13:34:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A79D6C21DA6; Thu, 27 Dec 2018 13:34:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1CC55C21D8E; Thu, 27 Dec 2018 13:34:25 +0000 (UTC) Received: from mail-pl1-f195.google.com (mail-pl1-f195.google.com [209.85.214.195]) by lists.denx.de (Postfix) with ESMTPS id CBDFAC21D4A for ; Thu, 27 Dec 2018 13:34:21 +0000 (UTC) Received: by mail-pl1-f195.google.com with SMTP id t13so8779358ply.13 for ; Thu, 27 Dec 2018 05:34:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XcSA7s+oLgmN85P8ox+EqoDW8pxu/q+x9q7bwXVLZPw=; b=McU3kb3CdGenPhvtRpk5ZBMrzoiiafqWz25AGgy5ibyxbFR/zCcwTa8cdoLpeUol/Y InPwkpLgyqoTrPX77Gso3PxGDKn0kUCAvSEdgE1JsBtdckttnSSgcnIVyVx7OLOjuRjW twhjO3WT5arb4TDXuQuseXPVz3s8N0J64JViA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XcSA7s+oLgmN85P8ox+EqoDW8pxu/q+x9q7bwXVLZPw=; b=gdc8ittGzLQEYJcyXN7QDiN3PgmsIaugkm0Y5mkyI8sJGHP5/fHTkU3m8/m61wcB97 1GgocFJOnTRlANj8MiSoZ3G4qLX2ulbzOPH2Lyp05XtHo7uU2VC43FlfePyTOd11qeYG o9REFrC79UZLDCFXyKlM7597FEZyvfB7BNBuEDXInuggMCK0tQyHdqPcAX7V3sd0+PIp DdgjaPhNO+ucqu/QRqTKmXZdsj8gVrvVWqpiqBwOsReMK3Tmg4zJsIt0dDPjvNP0/Jwz jicp/ziDzQ5Toici+5FZ9Q9wMKhcIs1lahKjEffJg534sg/vU9YrPvGUgeAMaoo5TbYu y91A== X-Gm-Message-State: AJcUukfC1RJdm1l+JYdYM1jaNhTygskjNhZl549UPBnQULX6hvqIg9lY XlEvGlaE3gnEX3KrojlkmhkH X-Received: by 2002:a17:902:b090:: with SMTP id p16mr23720600plr.190.1545917660303; Thu, 27 Dec 2018 05:34:20 -0800 (PST) Received: from localhost.localdomain ([2409:4072:609a:eb3:ec1b:e2c3:b711:737a]) by smtp.gmail.com with ESMTPSA id c67sm47826461pfg.170.2018.12.27.05.34.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Dec 2018 05:34:19 -0800 (PST) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: jh80.chung@samsung.com, albert.u.boot@aribaud.net, sjg@chromium.org, trini@konsulko.com Date: Thu, 27 Dec 2018 19:04:04 +0530 Message-Id: <20181227133405.11482-2-manivannanece23@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181227133405.11482-1-manivannanece23@gmail.com> References: <20181227133405.11482-1-manivannanece23@gmail.com> Cc: u-boot@lists.denx.de, Manivannan Sadhasivam Subject: [U-Boot] [PATCH v2 2/3] mmc: Convert HI6220 MMC driver to driver model X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Manivannan Sadhasivam Convert HiSilicon HI6220 MMC driver based on DWMMC IP to driver model. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Simon Glass --- Changes in v2: Added Simon's Reviewed-by tag. configs/hikey_defconfig | 1 + drivers/mmc/hi6220_dw_mmc.c | 100 +++++++++++++++++++++++++----------- 2 files changed, 70 insertions(+), 31 deletions(-) diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 8dc5a2823eb..cced2b4802e 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" +CONFIG_DM_MMC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_K3=y CONFIG_CONS_INDEX=4 diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index ce395d53c94..cc58aff38cc 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -5,51 +5,89 @@ */ #include +#include #include +#include +#include #include -#include -#define DWMMC_MAX_CH_NUM 4 +DECLARE_GLOBAL_DATA_PTR; -#define DWMMC_MAX_FREQ 50000000 -#define DWMMC_MIN_FREQ 400000 +struct hi6220_dwmmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; -/* Source clock is configured to 100MHz by ATF bl1*/ -#define MMC0_DEFAULT_FREQ 100000000 +struct hi6220_dwmmc_priv_data { + struct dwmci_host host; +}; -static int hi6220_dwmci_core_init(struct dwmci_host *host, int index) +static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev) { - host->name = "Hisilicon DWMMC"; + struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; - host->dev_index = index; + host->name = dev->name; + host->ioaddr = (void *)devfdt_get_addr(dev); + host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "bus-width", 4); + + /* use non-removable property for differentiating SD card and eMMC */ + if (dev_read_bool(dev, "non-removable")) + host->dev_index = 0; + else + host->dev_index = 1; + + host->priv = priv; - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { - printf("DWMMC%d registration failed\n", index); - return -1; - } return 0; } -/* - * This function adds the mmc channel to be registered with mmc core. - * index - mmc channel number. - * regbase - register base address of mmc channel specified in 'index'. - * bus_width - operating bus width of mmc channel specified in 'index'. - */ -int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width) +static int hi6220_dwmmc_probe(struct udevice *dev) { - struct dwmci_host *host = NULL; + struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; - host = calloc(1, sizeof(struct dwmci_host)); - if (!host) { - pr_err("dwmci_host calloc failed!\n"); - return -ENOMEM; - } + /* Use default bus speed due to absence of clk driver */ + host->bus_hz = 50000000; - host->ioaddr = (void *)(ulong)regbase; - host->buswidth = bus_width; - host->bus_hz = MMC0_DEFAULT_FREQ; + dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); + host->mmc = &plat->mmc; - return hi6220_dwmci_core_init(host, index); + host->mmc->priv = &priv->host; + upriv->mmc = host->mmc; + host->mmc->dev = dev; + + return dwmci_probe(dev); } + +static int hi6220_dwmmc_bind(struct udevice *dev) +{ + struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev); + int ret; + + ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id hi6220_dwmmc_ids[] = { + { .compatible = "hisilicon,hi6220-dw-mshc" }, + { } +}; + +U_BOOT_DRIVER(hi6220_dwmmc_drv) = { + .name = "hi6220_dwmmc", + .id = UCLASS_MMC, + .of_match = hi6220_dwmmc_ids, + .ofdata_to_platdata = hi6220_dwmmc_ofdata_to_platdata, + .ops = &dm_dwmci_ops, + .bind = hi6220_dwmmc_bind, + .probe = hi6220_dwmmc_probe, + .priv_auto_alloc_size = sizeof(struct hi6220_dwmmc_priv_data), + .platdata_auto_alloc_size = sizeof(struct hi6220_dwmmc_plat), +};