[17/17] tests/tcg/aarch64: Add mte smoke tests

Message ID 20190114011122.5995-18-richard.henderson@linaro.org
State Superseded
Headers show
Series
  • target/arm: Implement ARMv8.5-MemTag
Related show

Commit Message

Richard Henderson Jan. 14, 2019, 1:11 a.m.
??? Requires a quite recent aarch64 assembler.  Use .inst instead?

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tests/tcg/aarch64/mte-1.c         | 27 +++++++++++++++++++++
 tests/tcg/aarch64/mte-2.c         | 39 +++++++++++++++++++++++++++++++
 tests/tcg/aarch64/Makefile.target |  4 ++++
 3 files changed, 70 insertions(+)
 create mode 100644 tests/tcg/aarch64/mte-1.c
 create mode 100644 tests/tcg/aarch64/mte-2.c

-- 
2.17.2

Comments

Alex Bennée Jan. 14, 2019, 2:22 p.m. | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> ??? Requires a quite recent aarch64 assembler.  Use .inst instead?


How recent? Given buster is nearing release we could start using it as a
basis for the ARM cross compiler images. That is shipping gcc 8.2.0 as
of now.

>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  tests/tcg/aarch64/mte-1.c         | 27 +++++++++++++++++++++

>  tests/tcg/aarch64/mte-2.c         | 39 +++++++++++++++++++++++++++++++

>  tests/tcg/aarch64/Makefile.target |  4 ++++

>  3 files changed, 70 insertions(+)

>  create mode 100644 tests/tcg/aarch64/mte-1.c

>  create mode 100644 tests/tcg/aarch64/mte-2.c

>

> diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c

> new file mode 100644

> index 0000000000..740bf506f1

> --- /dev/null

> +++ b/tests/tcg/aarch64/mte-1.c

> @@ -0,0 +1,27 @@

> +/*

> + * Memory tagging, basic pass cases.

> + */

> +

> +#include <assert.h>

> +

> +asm(".arch armv8.5-a+memtag");

> +

> +int data[16 / sizeof(int)] __attribute__((aligned(16)));

> +

> +int main(int ac, char **av)

> +{

> +    int *p0 = data;

> +    int *p1, *p2;

> +    long c;

> +

> +    asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1));

> +    assert(p1 != p0);

> +    asm("subp %0,%1,%2" : "=r"(c) : "r"(p0), "r"(p1));

> +    assert(c == 0);

> +

> +    asm("stg [%0]" : : "r"(p1));

> +    asm("ldg %0, [%1]" : "=r"(p2) : "r"(p0));

> +    assert(p1 == p2);

> +

> +    return 0;

> +}

> diff --git a/tests/tcg/aarch64/mte-2.c b/tests/tcg/aarch64/mte-2.c

> new file mode 100644

> index 0000000000..4d2004ab41

> --- /dev/null

> +++ b/tests/tcg/aarch64/mte-2.c

> @@ -0,0 +1,39 @@

> +/*

> + * Memory tagging, basic fail cases.

> + */

> +

> +#include <assert.h>

> +#include <signal.h>

> +#include <stdlib.h>

> +

> +asm(".arch armv8.5-a+memtag");

> +

> +int data[16 / sizeof(int)] __attribute__((aligned(16)));

> +

> +void pass(int sig)

> +{

> +    exit(0);

> +}

> +

> +int main(int ac, char **av)

> +{

> +    int *p0 = data;

> +    int *p1, *p2;

> +    long excl = 1;

> +

> +    /* Create two differently tagged pointers.  */

> +    asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl));

> +    asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1));

> +    assert(excl != 1);

> +    asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl));

> +    assert(p1 != p2);

> +

> +    /* Store the tag from the first pointer.  */

> +    asm("stg [%0]" : : "r"(p1));

> +

> +    *p1 = 0;

> +    signal(SIGSEGV, pass);

> +    *p2 = 0;

> +

> +    assert(0);

> +}

> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target

> index 3d56e7c6ea..1c4ebe894c 100644

> --- a/tests/tcg/aarch64/Makefile.target

> +++ b/tests/tcg/aarch64/Makefile.target

> @@ -19,4 +19,8 @@ AARCH64_TESTS += bti-1

>  bti-1: LDFLAGS += -nostartfiles -nodefaultlibs -nostdlib

>  run-bti-1: QEMU += -cpu max,guarded_pages=on

>

> +AARCH64_TESTS += mte-1 mte-2

> +mte-%: CFLAGS += -O -g

> +run-mte-%: QEMU += -cpu max

> +

>  TESTS:=$(AARCH64_TESTS)



--
Alex Bennée
Richard Henderson Jan. 14, 2019, 9:07 p.m. | #2
On 1/15/19 1:22 AM, Alex Bennée wrote:
> 

> Richard Henderson <richard.henderson@linaro.org> writes:

> 

>> ??? Requires a quite recent aarch64 assembler.  Use .inst instead?

> 

> How recent? Given buster is nearing release we could start using it as a

> basis for the ARM cross compiler images. That is shipping gcc 8.2.0 as

> of now.


Not yet released.  The patches adding the support include

commit 3a0f69be5589d351453afebd0974992cff3ee4d1
Author: Sudakshina Das <sudi.das@arm.com>
Date:   Mon Nov 12 13:29:38 2018 +0000

    [BINUTILS, AARCH64, 8/8] Add data cache instructions
    for Memory Tagging Extension

but the most recent binutils release branch (2.31) is from June.


r~

Patch

diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c
new file mode 100644
index 0000000000..740bf506f1
--- /dev/null
+++ b/tests/tcg/aarch64/mte-1.c
@@ -0,0 +1,27 @@ 
+/*
+ * Memory tagging, basic pass cases.
+ */
+
+#include <assert.h>
+
+asm(".arch armv8.5-a+memtag");
+
+int data[16 / sizeof(int)] __attribute__((aligned(16)));
+
+int main(int ac, char **av)
+{
+    int *p0 = data;
+    int *p1, *p2;
+    long c;
+
+    asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1));
+    assert(p1 != p0);
+    asm("subp %0,%1,%2" : "=r"(c) : "r"(p0), "r"(p1));
+    assert(c == 0);
+
+    asm("stg [%0]" : : "r"(p1));
+    asm("ldg %0, [%1]" : "=r"(p2) : "r"(p0));
+    assert(p1 == p2);
+
+    return 0;
+}
diff --git a/tests/tcg/aarch64/mte-2.c b/tests/tcg/aarch64/mte-2.c
new file mode 100644
index 0000000000..4d2004ab41
--- /dev/null
+++ b/tests/tcg/aarch64/mte-2.c
@@ -0,0 +1,39 @@ 
+/*
+ * Memory tagging, basic fail cases.
+ */
+
+#include <assert.h>
+#include <signal.h>
+#include <stdlib.h>
+
+asm(".arch armv8.5-a+memtag");
+
+int data[16 / sizeof(int)] __attribute__((aligned(16)));
+
+void pass(int sig)
+{
+    exit(0);
+}
+
+int main(int ac, char **av)
+{
+    int *p0 = data;
+    int *p1, *p2;
+    long excl = 1;
+
+    /* Create two differently tagged pointers.  */
+    asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl));
+    asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1));
+    assert(excl != 1);
+    asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl));
+    assert(p1 != p2);
+
+    /* Store the tag from the first pointer.  */
+    asm("stg [%0]" : : "r"(p1));
+
+    *p1 = 0;
+    signal(SIGSEGV, pass);
+    *p2 = 0;
+
+    assert(0);
+}
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 3d56e7c6ea..1c4ebe894c 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -19,4 +19,8 @@  AARCH64_TESTS += bti-1
 bti-1: LDFLAGS += -nostartfiles -nodefaultlibs -nostdlib
 run-bti-1: QEMU += -cpu max,guarded_pages=on
 
+AARCH64_TESTS += mte-1 mte-2
+mte-%: CFLAGS += -O -g
+run-mte-%: QEMU += -cpu max
+
 TESTS:=$(AARCH64_TESTS)