From patchwork Thu Jan 17 10:23:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 155815 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp1784380jaa; Thu, 17 Jan 2019 02:23:38 -0800 (PST) X-Google-Smtp-Source: ALg8bN5LJ40LajhoKFKJI2tzS3JJkxMjpeOhNAAyFfv8MDlodd7EzUFkY1mUVLbGQP6+0AnAPt8s X-Received: by 2002:a62:d206:: with SMTP id c6mr13121894pfg.245.1547720618285; Thu, 17 Jan 2019 02:23:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547720618; cv=none; d=google.com; s=arc-20160816; b=fZfznr2vSZBZY/jWW9jcTK03f1wvD1W1313z7tqmbnm/B8QI1v0Yzx9sVhIf5RPb7t fpAK11XlCOhjvlOqjJC552gaeCm5jqJ5o5d6wgclXoolmjDx+kCa0+mB9cpnr3YdH080 69uZHPnXhVBXvmdjTfT9JgZpSa4rwYRrWK1vjyKkSz9g4Q8vQKbBcPsjwdD8vv1RhOw0 wJZh6u2txrFo10+2vMP2IlZUngJ4QUR1Uvt6gmRK08kpQ6kI8Joc929uAyA+UBtCnHv4 8Z0fILgGMAMao4LqW1bSEacBTQFEQZA6vHVw4zDQF1pi1rOWx/HeLxEZq+A13Xg8tS9x grjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9Y0Y5B6s0w0R3Gp1L8M/91nvIc1hUn7ja0tycQpJro8=; b=0VXjznv3yEpoA3h1/K3tHhc4IiwEUKHpjsm/LM4p+2W10Ot9aCPyxVbg5ZDPTOCypY /ZncAFV8THMWaprOu0uKoJG60BK0NA6BMY93f2GO3SImJ6cTo74tDcm7RPoFCpzbEDku Iz2pKIOW7Dpy43SdHSPbHw+IM3sAbeq3VZHWwF+zVL0FQvachGnh7cuIbMMKXrlLQDk5 eXEu1f8IXGDu1Oa03E5n1jBjQsrJdZOM7kYl7BI1+MHY096AsqufHSIeRHQOTm73tiPJ snd+8qRLXc30DIasa04w9Wkeip1tXJyx/8EG+8YysDqit5EO9hvdQjOHfTBMmVC5iHGu RU5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=HzOoNuPd; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z123si1414353pfc.97.2019.01.17.02.23.38; Thu, 17 Jan 2019 02:23:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=HzOoNuPd; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727954AbfAQKX2 (ORCPT + 5 others); Thu, 17 Jan 2019 05:23:28 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:36583 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725990AbfAQKX2 (ORCPT ); Thu, 17 Jan 2019 05:23:28 -0500 Received: by mail-wm1-f68.google.com with SMTP id p6so458706wmc.1 for ; Thu, 17 Jan 2019 02:23:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Y0Y5B6s0w0R3Gp1L8M/91nvIc1hUn7ja0tycQpJro8=; b=HzOoNuPdoK9zHB3vqZE86aLSUSENong1ks01P2QHeVQ6ZAHt5MqnxRh8hf1J/cwIo6 GqRcSKTR03esabYqdhw0iJkLipx5NqOqTkny55JN+wxHdeuqzLGSt/M0I36Tn7Z+pPik 2QacXWzVG+re0r3nAtURi3FSsSjyuL+S2XbS0rla/qUP5N6Dv6t8fUQG2cH4RrRzLnau g/DnhUptnm7Z13p5IoN79X642DJTDCQyDzhOkR+8/Q9WsgSy0yudjp4xKuLNOPJF6D0Q OUydwcTgOzE/g9VugndT90IAdQ9fagXP5YBeaYyehkLvo+vluMNnOkl7rmkrOZwkv9+n +2/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Y0Y5B6s0w0R3Gp1L8M/91nvIc1hUn7ja0tycQpJro8=; b=r1n3rJjQcRqFgsh57yMARudy6xIf2BfaFc0Ol+ys1umUd7wpCjbf0unuW+JbHTBV4l +aoUWcC/sP8faHgHJMhkzbCA8fM9Wphg7uxx+PHpVZLPWFtgySDkGm8PGR+GQnsHELtT FXLXJ7Et/gnD9XqCy/Vb7R57wWcPxNAbEyd6TD74hM+TAjkXvLhAV/eGyPlv+D9gMhq5 cUa+0cMgKHAdhVOiK+0MgBNRLJHjPABsNdL4rwNUJkqHwyVbL7lliQC3QeFC3GQ2N0fq w3o1JOpDIta8H3Y3zQ9hxnt+rGABmhuoPheT3k2qsVpy8pLQJ3KNyyTnuYY099tvByC5 SOTQ== X-Gm-Message-State: AJcUukcVbqjXeFv4G1HNc3Qaeijimo0/oyc4YSFZIpsHiJDVNyL0WXPJ idxzCOE4l+9NviBwJ4CZlo9Rig== X-Received: by 2002:a1c:f509:: with SMTP id t9mr11758492wmh.76.1547720606130; Thu, 17 Jan 2019 02:23:26 -0800 (PST) Received: from boomer.local ([2a01:e34:eeb6:4690:106b:bae3:31ed:7561]) by smtp.googlemail.com with ESMTPSA id u10sm66400530wrr.33.2019.01.17.02.23.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 Jan 2019 02:23:25 -0800 (PST) From: Jerome Brunet To: Linus Walleij , Kevin Hilman Cc: Xingyu Chen , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Jianxin Pan , Jerome Brunet Subject: [PATCH 2/3] pinctrl: meson: fix G12A ao pull registers base address Date: Thu, 17 Jan 2019 11:23:14 +0100 Message-Id: <20190117102315.1833-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190117102315.1833-1-jbrunet@baylibre.com> References: <20190117102315.1833-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Xingyu Chen Since Meson G12A SoC, Introduce new ao registers AO_RTI_PULL_UP_EN_REG and AO_GPIO_O. These bits of controlling output level are remapped to the new register AO_GPIO_O, and the AO_GPIO_O_EN_N support only controlling output enable. These bits of controlling pull enable are remapped to the new register AO_RTI_PULL_UP_EN_REG, and the AO_RTI_PULL_UP_REG support only controlling pull type(up/down). The new layout of ao gpio/pull registers is as follows: - AO_GPIO_O_EN_N [offset: 0x9 << 2] - AO_GPIO_I [offset: 0xa << 2] - AO_RTI_PULL_UP_REG [offset: 0xb << 2] - AO_RTI_PULL_UP_EN_REG [offset: 0xc << 2] - AO_GPIO_O [offset: 0xd << 2] >From above, we can see ao GPIO registers region has been separated by the ao pull registers. In order to ensure the continuity of the region on software, the ao GPIO and ao pull registers use the same base address, but can be identified by the offset. Fixes: 29ae0952e85f ("pinctrl: meson-g12a: add pinctrl driver support") Signed-off-by: Xingyu Chen Signed-off-by: Jianxin Pan Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index ea87d739f534..a4ae1ac5369e 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -31,6 +31,9 @@ * In some cases the register ranges for pull enable and pull * direction are the same and thus there are only 3 register ranges. * + * Since Meson G12A SoC, the ao register ranges for gpio, pull enable + * and pull direction are the same, so there are only 2 register ranges. + * * For the pull and GPIO configuration every bank uses a contiguous * set of bits in the register sets described above; the same register * can be shared by more banks with different offsets. @@ -488,23 +491,22 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, return PTR_ERR(pc->reg_mux); } - pc->reg_pull = meson_map_resource(pc, gpio_np, "pull"); - if (IS_ERR(pc->reg_pull)) { - dev_err(pc->dev, "pull registers not found\n"); - return PTR_ERR(pc->reg_pull); + pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio"); + if (IS_ERR(pc->reg_gpio)) { + dev_err(pc->dev, "gpio registers not found\n"); + return PTR_ERR(pc->reg_gpio); } + pc->reg_pull = meson_map_resource(pc, gpio_np, "pull"); + /* Use gpio region if pull one is not present */ + if (IS_ERR(pc->reg_pull)) + pc->reg_pull = pc->reg_gpio; + pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable"); /* Use pull region if pull-enable one is not present */ if (IS_ERR(pc->reg_pullen)) pc->reg_pullen = pc->reg_pull; - pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio"); - if (IS_ERR(pc->reg_gpio)) { - dev_err(pc->dev, "gpio registers not found\n"); - return PTR_ERR(pc->reg_gpio); - } - return 0; }