[1/2,v2] mtd: rawnand: fsmc: Reset NAND timings on resume()

Message ID 20190126131056.11364-1-linus.walleij@linaro.org
State Accepted
Commit 30c72ab142a2d1a49d5fbd4014864cec07cd7a65
Headers show
Series
  • [1/2,v2] mtd: rawnand: fsmc: Reset NAND timings on resume()
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Commit Message

Linus Walleij Jan. 26, 2019, 1:10 p.m.
When we go through a suspend/resume cycle the NAND
timings and other settings may have been lost so reset
the chip to bring it up in a known working state.

The FSMC only supports single CS chips so we only need
to call nand_reset(chip, 0).

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

---
ChangeLog v1->v2:
- Update commit message.
---
 drivers/mtd/nand/raw/fsmc_nand.c | 1 +
 1 file changed, 1 insertion(+)

-- 
2.20.1


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Comments

Miquel Raynal Jan. 28, 2019, 10:02 a.m. | #1
Hi Linus,

Linus Walleij <linus.walleij@linaro.org> wrote on Sat, 26 Jan 2019
14:10:55 +0100:

> When we go through a suspend/resume cycle the NAND
> timings and other settings may have been lost so reset
> the chip to bring it up in a known working state.
> 
> The FSMC only supports single CS chips so we only need
> to call nand_reset(chip, 0).
> 
> Cc: Miquel Raynal <miquel.raynal@bootlin.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Both patches applied to nand/next.

Thanks,
Miquèl

Patch

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index c9149a37f8f0..4050843dd35e 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1164,6 +1164,7 @@  static int fsmc_nand_resume(struct device *dev)
 		clk_prepare_enable(host->clk);
 		if (host->dev_timings)
 			fsmc_nand_setup(host, host->dev_timings);
+		nand_reset(&host->nand, 0);
 	}
 
 	return 0;