From patchwork Mon Jan 28 17:00:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 156797 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3660076jaa; Mon, 28 Jan 2019 09:06:38 -0800 (PST) X-Google-Smtp-Source: ALg8bN73UL1p1Sdf4lWvXG835C9AczGveYJcFYonPhJ/c/vzT4FYFVi9lsVWSLmacAgBaMWrONMf X-Received: by 2002:a17:902:2bc5:: with SMTP id l63mr22904799plb.107.1548695198872; Mon, 28 Jan 2019 09:06:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548695198; cv=none; d=google.com; s=arc-20160816; b=NdWrJvPdEuA05ZLJpxPN4vWg/cbZ6uBuA6kgRbn7PetHTwRg3RtVxm/sckK6wbgLq8 ehLJ4uV+SKy4/hCVBPHURG8Z0TMzZzroz54rltvD915ETrbZsMSPArH5ZbNaZdqLlZ4f EmfjL29wibdFyXHFI6+0RGLl5dctw0LDz9YNqEpctycvkcIr/7xpGGEQK86cZvEMdGv8 v7EttGRt7KgGTO7v2lNQAf/J2BhvUXkaFmQC6e0Vvhzpe5ZJKTBHWWNvX4c8S117aYy+ RvQtj9GMGyWJxxDUIzapAX2lrq1elz4XGJ7iv/WCWaO9sm3brE9KulnKCR0MfMjTV8N0 pocw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=BJi/r8goePKYT80tTkrlzFxUlyhO/0drjRFh1r7hDY0=; b=pEkuyhwkqGTgy9DkIn3R/YMALWQhVK+I+MmnN1XH/hTD4LMtTh7wWU2jBDUoFMNhIn b2bVatqM0RLCSSmPWRYdbFJAzl7eqKMasF3Uk2v6hHOZH2e4zMk2IQvUpkzF0rgZpxS0 Mi9cXUe+/OOSkw0WgOlPDvYwsDLWKTUhZ62jP2Of4TDOu4smGJp1xs4Aql+4vuzraEHt 74r/nFF9Ja+GgJ6QNrTsOLs7x+6yRnQIsfh74LCJ3Dq7630PCJfs4yjiOvbLVEr+X1Wk mF3EKbcFHFlJA59gZQZJSNfpVbVbD9JiiYVkp5d2Oq5TJwjmtxWu9HUN/FfC+L9ztGev x68Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jOC/gCv+"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e3si34122658pfe.203.2019.01.28.09.06.38; Mon, 28 Jan 2019 09:06:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jOC/gCv+"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387849AbfA1RGg (ORCPT + 31 others); Mon, 28 Jan 2019 12:06:36 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:36558 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387504AbfA1RGe (ORCPT ); Mon, 28 Jan 2019 12:06:34 -0500 Received: by mail-wr1-f65.google.com with SMTP id u4so18921482wrp.3 for ; Mon, 28 Jan 2019 09:06:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BJi/r8goePKYT80tTkrlzFxUlyhO/0drjRFh1r7hDY0=; b=jOC/gCv+ww2Yu/MYiUQUBvAFbY8ecJ0ZRWphkgrPvrPm0QMErUWDEhxbow73FDZBoV i8cyw74FgffAglgqLifE93t6ag0f4uPemgK+KlpTkMOyCYL15Gd2B+n2IO3aLE0pXORH TFN5L/uWHFFzAn2gLv3/uFQ5fN7OHdfqr+hWY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BJi/r8goePKYT80tTkrlzFxUlyhO/0drjRFh1r7hDY0=; b=m8dWGVcDFeFu7p/ci+sfPwbI1EXahkBNAbub3T/ciqa2S3an93nkjz/nF0sng9Jkgi B1mcjJTLT27LBUVEGiqTUPaAqjxrdxnfZ9lwDKqFcHjsN90HK2k8uHkGW3/6kknRXAdE wBS0LYN8w/XnCicEWWflC43agvcUDAHOe9JS7t9vcv8Ommoy2qmHLkG7OFPA0A5BatfJ Q7AMcWarL+sgc3IFcx0drrfb3IQ8k8hNgN5S4Z7O/gUajksiznplBaOt+Tucm73g1/0J oQoZJCnIUX4Ix7DMHzlgnV1xfFgAVcoqJafi+kvbX8acNHJBIFmbQ1pvgbGrz7zTK3Of ztuQ== X-Gm-Message-State: AJcUukdtvWSJZLTF8pVGo0bCdWd1bZxXS54PbV0ylgesd8jn9IxyxWWm FjsRzSm/tqkp6sxYHZ/njsBffrkBpCI= X-Received: by 2002:adf:fe11:: with SMTP id n17mr22013357wrr.329.1548695191721; Mon, 28 Jan 2019 09:06:31 -0800 (PST) Received: from localhost.localdomain (laubervilliers-657-1-83-120.w92-154.abo.wanadoo.fr. [92.154.90.120]) by smtp.gmail.com with ESMTPSA id h10sm68375392wmf.44.2019.01.28.09.06.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Jan 2019 09:06:30 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: Marc Zyngier , stable@vger.kernel.org, Ard Biesheuvel Subject: [PATCH] irqchip/gic-v3-its: Align PCI Multi-MSI allocation on their size Date: Mon, 28 Jan 2019 18:00:15 +0100 Message-Id: <20190128170015.12253-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier Commit 8208d1708b88b412ca97f50a6d951242c88cbbac upstream. The way we allocate events works fine in most cases, except when multiple PCI devices share an ITS-visible DevID, and that one of them is trying to use MultiMSI allocation. In that case, our allocation is not guaranteed to be zero-based anymore, and we have to make sure we allocate it on a boundary that is compatible with the PCI Multi-MSI constraints. Fix this by allocating the full region upfront instead of iterating over the number of MSIs. MSI-X are always allocated one by one, so this shouldn't change anything on that front. Fixes: b48ac83d6bbc2 ("irqchip: GICv3: ITS: MSI support") Cc: # v4.4 - v4.9 Reported-by: Ard Biesheuvel Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier [ardb: rebased onto v4.9.153, should apply cleanly onto v4.4.y as well] Signed-off-by: Ard Biesheuvel --- drivers/irqchip/irq-gic-v3-its.c | 25 ++++++++++---------- 1 file changed, 13 insertions(+), 12 deletions(-) -- 2.20.1 diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 558c7589c329..83ca754250fb 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1372,13 +1372,14 @@ static void its_free_device(struct its_device *its_dev) kfree(its_dev); } -static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) +static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) { int idx; - idx = find_first_zero_bit(dev->event_map.lpi_map, - dev->event_map.nr_lpis); - if (idx == dev->event_map.nr_lpis) + idx = bitmap_find_free_region(dev->event_map.lpi_map, + dev->event_map.nr_lpis, + get_count_order(nvecs)); + if (idx < 0) return -ENOSPC; *hwirq = dev->event_map.lpi_base + idx; @@ -1464,20 +1465,20 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, int err; int i; - for (i = 0; i < nr_irqs; i++) { - err = its_alloc_device_irq(its_dev, &hwirq); - if (err) - return err; + err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); + if (err) + return err; - err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); + for (i = 0; i < nr_irqs; i++) { + err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) return err; irq_domain_set_hwirq_and_chip(domain, virq + i, - hwirq, &its_irq_chip, its_dev); + hwirq + i, &its_irq_chip, its_dev); pr_debug("ID:%d pID:%d vID:%d\n", - (int)(hwirq - its_dev->event_map.lpi_base), - (int) hwirq, virq + i); + (int)(hwirq + i - its_dev->event_map.lpi_base), + (int)(hwirq + i), virq + i); } return 0;