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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id 85-v6sm2456868lja.16.2019.02.03.13.42.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 03 Feb 2019 13:42:43 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa Cc: Tim Harvey , Arnd Bergmann , Olof Johansson , Linus Walleij , Daniel Lezcano , Thomas Gleixner , devicetree@vger.kernel.org Subject: [PATCH 11/17 v1] clocksource/drivers/ixp4xx: Add DT bindings Date: Sun, 3 Feb 2019 22:41:59 +0100 Message-Id: <20190203214205.13594-12-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190203214205.13594-1-linus.walleij@linaro.org> References: <20190203214205.13594-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds device tree bindings for the Intel IXP4xx timers. Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- Clocksource/timer maintainers: I am requesting an ACK for this once you're happy with the bindings, as I intend to merge all of this IXP4xx rework through ARM SoC. --- .../bindings/timer/intel,ixp4xx-timer.txt | 18 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.txt -- 2.20.1 Reviewed-by: Rob Herring Acked-by: Daniel Lezcano diff --git a/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.txt b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.txt new file mode 100644 index 000000000000..5b93477bb6ed --- /dev/null +++ b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.txt @@ -0,0 +1,18 @@ +Intel IXP4xx XScale Networking Processors Timers + +This timer is found in the Intel IXP4xx processors. + +Required properties: + +- compatible : Must be + "intel,ixp4xx-timer" +- reg : Should contain registers location and length +- interrupts : Should contain the two timer interrupts + +Example: + +timer@c8005000 { + compatible = "intel,ixp4xx-timer"; + reg = <0xc8005000 0x100>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; +}; diff --git a/MAINTAINERS b/MAINTAINERS index ec318f09540c..775a623dc91d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1651,6 +1651,7 @@ M: Krzysztof Halasa L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.txt +F: Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.txt F: arch/arm/mach-ixp4xx/ F: drivers/clocksource/timer-ixp4xx.c F: drivers/gpio/gpio-ixp4xx.c