From patchwork Tue Feb 12 07:13:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 158120 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3510326jaa; Mon, 11 Feb 2019 23:14:47 -0800 (PST) X-Google-Smtp-Source: AHgI3IYBOBbPMPP5DGOGRxsqTL/Qf1+Hl01FYl2DDDlZNzYOQGm9wcoeXgQ3HtuCeM9idpyGDQ5d X-Received: by 2002:a63:c42:: with SMTP id 2mr2341096pgm.372.1549955687593; Mon, 11 Feb 2019 23:14:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549955687; cv=none; d=google.com; s=arc-20160816; b=WJgrnDNjmgmVkustGEICpLW2NQ38MAZq9sUUqa56jWKp0eK3y7d8PljrWvtFeK9pJ8 rKIGLKpP7DeWE79ti1DkR7Bvmwy7sHroNSnq3fzjMrpw/YPQQPJxSyZ9usYi3cA4or4Q rEyK0wLOMKyDS4ppprlGQ+t/wZOJIQWtS2We4hGIX9wdksPEU0urqu0oYx/7OqrMTxZV I6kCAR/n1JrkFe1apE9ZS9DY3Auo3mYoc9OmHTe7m7QDDVLBANinTyQ1XaJMxamkHIRN ypMLH2yQ8VBCUCt2QITrwZMfBHcD5B+CQUyhKEjm5AjHlr2If4fG02t9DQURR0HAhyhx CTvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=XGysdmS4tbl7yrVBNgBANjU9bQoRzs2DxSH9clfygmc=; b=mihmeJmNnzR1ouup8yv6SpP2bvcUyejUANdL/cru8VUCD2e6bhV21Tk0TmlRypQxZP qPW80g5INL82naKETwdjY/sOHxDCb0pbqO3fdMG1IdPLvLAWKtXVSAFKkT6QSU0KELQP +sfZOC2hXiZYWXpSsZYIs1xmsGPwWPn378FSY4l+QBq4dw3Zs6V103sOfmZ5BiZaMvor /+ML+2KJQHLNfPk/TOx/VkHw2fFrzE0S1bSCcqMwauBK5caKJrceGiLaewgnQ05UXrX/ HPML6AKiIcKL+/T6XzIld6hLJt6hW1A+BP3vtkqb0la9dtMWDyibh7gMe5oGS+0VwSWu 6vng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=bYe38x01; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k123si5526601pgc.280.2019.02.11.23.14.47; Mon, 11 Feb 2019 23:14:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=bYe38x01; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728206AbfBLHOp (ORCPT + 31 others); Tue, 12 Feb 2019 02:14:45 -0500 Received: from conuserg-09.nifty.com ([210.131.2.76]:37708 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728096AbfBLHOl (ORCPT ); Tue, 12 Feb 2019 02:14:41 -0500 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id x1C7DPdY019269; Tue, 12 Feb 2019 16:13:34 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com x1C7DPdY019269 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1549955615; bh=XGysdmS4tbl7yrVBNgBANjU9bQoRzs2DxSH9clfygmc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bYe38x01hE39o4/AA/qy9v5uFm01SpfgMRed/PfTpIuoWqEDDky/wMEE4sI5Q4+YO qifHPgOBUo03n0dpxvyCjVBy29/TTB6YVlROGLw0rJufHUCYd2/rwXP3HQ2xaVe2ZE F6pDqLAIzlR7LbI1um3q87r/JAaYlY6TknA+fYnsrXo47WBnIGZm4pPnMWx2E3qa6Y OAsO7T5SvUe6ZhfluOoB3evVhyorFkZdZQs0cA78miGWb5Z5cHAP53guWKoyzDa+Zw b89k6KY3JTDW7+Hzoeir8VXAgXsYZuKfpauNXLB9Q4qVomu+cUoPRbY7Dzyx8kAbmk WqDJrxq8/CDfQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org, Miquel Raynal Cc: Boris Brezillon , Masahiro Yamada , Brian Norris , linux-kernel@vger.kernel.org, Marek Vasut , Richard Weinberger , David Woodhouse Subject: [PATCH v2 10/10] mtd: rawnand: denali: clean up coding style Date: Tue, 12 Feb 2019 16:13:02 +0900 Message-Id: <1549955582-30346-11-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1549955582-30346-1-git-send-email-yamada.masahiro@socionext.com> References: <1549955582-30346-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Eliminate the following reports from 'scripts/checkpatch.pl --strict'. CHECK: Prefer kernel type 'u8' over 'uint8_t' CHECK: Prefer kernel type 'u32' over 'uint32_t' CHECK: Alignment should match open parenthesis I slightly changed denali_check_erased_page() to make it shorter. Signed-off-by: Masahiro Yamada --- Changes in v2: None drivers/mtd/nand/raw/denali.c | 53 ++++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 28 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index eb58136..82b2b8e 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -124,7 +124,7 @@ static irqreturn_t denali_isr(int irq, void *dev_id) { struct denali_controller *denali = dev_id; irqreturn_t ret = IRQ_NONE; - uint32_t irq_status; + u32 irq_status; int i; spin_lock(&denali->irq_lock); @@ -164,7 +164,7 @@ static u32 denali_wait_for_irq(struct denali_controller *denali, u32 irq_mask, unsigned int timeout_ms) { unsigned long time_left, flags; - uint32_t irq_status; + u32 irq_status; spin_lock_irqsave(&denali->irq_lock, flags); @@ -239,20 +239,17 @@ static int denali_check_erased_page(struct nand_chip *chip, unsigned int max_bitflips) { struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; - uint8_t *ecc_code = chip->oob_poi + denali->oob_skip_bytes; - int ecc_steps = chip->ecc.steps; - int ecc_size = chip->ecc.size; - int ecc_bytes = chip->ecc.bytes; + struct nand_ecc_ctrl *ecc = &chip->ecc; + u8 *ecc_code = chip->oob_poi + denali->oob_skip_bytes; int i, stat; - for (i = 0; i < ecc_steps; i++) { + for (i = 0; i < ecc->steps; i++) { if (!(uncor_ecc_flags & BIT(i))) continue; - stat = nand_check_erased_ecc_chunk(buf, ecc_size, - ecc_code, ecc_bytes, - NULL, 0, - chip->ecc.strength); + stat = nand_check_erased_ecc_chunk(buf, ecc->size, ecc_code, + ecc->bytes, NULL, 0, + ecc->strength); if (stat < 0) { ecc_stats->failed++; } else { @@ -260,8 +257,8 @@ static int denali_check_erased_page(struct nand_chip *chip, max_bitflips = max_t(unsigned int, max_bitflips, stat); } - buf += ecc_size; - ecc_code += ecc_bytes; + buf += ecc->size; + ecc_code += ecc->bytes; } return max_bitflips; @@ -273,7 +270,7 @@ static int denali_hw_ecc_fixup(struct nand_chip *chip, { struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; int bank = denali->active_bank; - uint32_t ecc_cor; + u32 ecc_cor; unsigned int max_bitflips; ecc_cor = ioread32(denali->reg + ECC_COR_INFO(bank)); @@ -304,17 +301,17 @@ static int denali_hw_ecc_fixup(struct nand_chip *chip, static int denali_sw_ecc_fixup(struct nand_chip *chip, struct denali_controller *denali, - unsigned long *uncor_ecc_flags, uint8_t *buf) + unsigned long *uncor_ecc_flags, u8 *buf) { struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; unsigned int ecc_size = chip->ecc.size; unsigned int bitflips = 0; unsigned int max_bitflips = 0; - uint32_t err_addr, err_cor_info; + u32 err_addr, err_cor_info; unsigned int err_byte, err_sector, err_device; - uint8_t err_cor_value; + u8 err_cor_value; unsigned int prev_sector = 0; - uint32_t irq_status; + u32 irq_status; denali_reset_irq(denali); @@ -379,7 +376,7 @@ static int denali_sw_ecc_fixup(struct nand_chip *chip, static void denali_setup_dma64(struct denali_controller *denali, dma_addr_t dma_addr, int page, bool write) { - uint32_t mode; + u32 mode; const int page_count = 1; mode = DENALI_MAP10 | DENALI_BANK(denali) | page; @@ -404,7 +401,7 @@ static void denali_setup_dma64(struct denali_controller *denali, static void denali_setup_dma32(struct denali_controller *denali, dma_addr_t dma_addr, int page, bool write) { - uint32_t mode; + u32 mode; const int page_count = 1; mode = DENALI_MAP10 | DENALI_BANK(denali); @@ -429,7 +426,7 @@ static int denali_pio_read(struct denali_controller *denali, u32 *buf, size_t size, int page) { u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page; - uint32_t irq_status, ecc_err_mask; + u32 irq_status, ecc_err_mask; int i; if (denali->caps & DENALI_CAP_HW_ECC_FIXUP) @@ -456,7 +453,7 @@ static int denali_pio_write(struct denali_controller *denali, const u32 *buf, size_t size, int page) { u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page; - uint32_t irq_status; + u32 irq_status; int i; denali_reset_irq(denali); @@ -487,7 +484,7 @@ static int denali_dma_xfer(struct denali_controller *denali, void *buf, size_t size, int page, bool write) { dma_addr_t dma_addr; - uint32_t irq_mask, irq_status, ecc_err_mask; + u32 irq_mask, irq_status, ecc_err_mask; enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE; int ret = 0; @@ -654,7 +651,7 @@ static int denali_memcpy_in(void *buf, unsigned int offset, unsigned int len, return 0; } -static int denali_read_page_raw(struct nand_chip *chip, uint8_t *buf, +static int denali_read_page_raw(struct nand_chip *chip, u8 *buf, int oob_required, int page) { struct denali_chip *dchip = to_denali_chip(chip); @@ -691,7 +688,7 @@ static int denali_memcpy_out(void *buf, unsigned int offset, unsigned int len, return 0; } -static int denali_write_page_raw(struct nand_chip *chip, const uint8_t *buf, +static int denali_write_page_raw(struct nand_chip *chip, const u8 *buf, int oob_required, int page) { struct denali_chip *dchip = to_denali_chip(chip); @@ -765,7 +762,7 @@ static int denali_write_oob(struct nand_chip *chip, int page) return nand_prog_page_end_op(chip); } -static int denali_read_page(struct nand_chip *chip, uint8_t *buf, +static int denali_read_page(struct nand_chip *chip, u8 *buf, int oob_required, int page) { struct denali_controller *denali = to_denali_controller(chip); @@ -798,7 +795,7 @@ static int denali_read_page(struct nand_chip *chip, uint8_t *buf, return stat; } -static int denali_write_page(struct nand_chip *chip, const uint8_t *buf, +static int denali_write_page(struct nand_chip *chip, const u8 *buf, int oob_required, int page) { struct mtd_info *mtd = nand_to_mtd(chip); @@ -817,7 +814,7 @@ static int denali_setup_data_interface(struct nand_chip *chip, int chipnr, int acc_clks, re_2_we, re_2_re, we_2_re, addr_2_data; int rdwr_en_lo, rdwr_en_hi, rdwr_en_lo_hi, cs_setup; int addr_2_data_mask; - uint32_t tmp; + u32 tmp; timings = nand_get_sdr_timings(conf); if (IS_ERR(timings))