| Message ID | 20190214125107.22178-9-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add model of the Arm Musca devboards | expand |
On 2/14/19 4:51 AM, Peter Maydell wrote: > In commit 4b635cf7a95e501211 we added a QOM property to the ARMSSE > object, but forgot to add it to the documentation comment in the > header. Correct the omission. > > Fixes: 4b635cf7a95e501211 ("hw/arm/armsse: Make SRAM bank size configurable") > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > include/hw/arm/armsse.h | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index f800bafb14a..444605b44dc 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -46,6 +46,8 @@ * being the same for both, to avoid having to have separate Property * lists for different variants. This restriction can be relaxed later * if necessary.) + * + QOM property "SRAM_ADDR_WIDTH" sets the number of bits used for the + * address of each SRAM bank (and thus the total amount of internal SRAM) * + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 0, * which are wired to its NVIC lines 32 .. n+32 * + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
In commit 4b635cf7a95e501211 we added a QOM property to the ARMSSE object, but forgot to add it to the documentation comment in the header. Correct the omission. Fixes: 4b635cf7a95e501211 ("hw/arm/armsse: Make SRAM bank size configurable") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- include/hw/arm/armsse.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.20.1