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Fri, 15 Feb 2019 12:52:40 +0000 (GMT) X-AuditID: cbfec7f5-367ff700000012c6-0d-5c66b618b971 Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 30.20.04284.816B66C5; Fri, 15 Feb 2019 12:52:40 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PMY00LS8X3MCB70@eusync4.samsung.com>; Fri, 15 Feb 2019 12:52:40 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marek Szyprowski , Thomas Gleixner , Daniel Lezcano , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz Subject: [PATCH 4/5] ARM: dts: exynos: Add support ARM architected timers Date: Fri, 15 Feb 2019 13:52:28 +0100 Message-id: <20190215125229.30180-5-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20190215125229.30180-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsWy7djP87oS29JiDHav17XYOGM9q8X1L89Z LeZ9lrU4f34Du8Wmx9dYLWac38dksfbIXXaLzZumMjtweGxa1cnmcefaHjaPd+fOsXtsXlLv 0bdlFaPH501yAWxRXDYpqTmZZalF+nYJXBm3frUzFXSIVNx+t4G5gXGHQBcjB4eEgInE6x79 LkYuDiGBFYwS07bNZIJwPjNKvPwwh7WLkROs6PbyQ4wQiWWMEv/eLIeqamCSuH5/PVgVm4Ch RNfbLjYQW0TAW2Lymb/sIEXMAl1MErcXHmAHSQgLeErMvtEGVsQioCrx7cg8FhCbV8BWYuPH y1Dr5CVWbzjADGJzCthJrFnTwwwySEJgBpvE418HGCGKXCQm/30O1SAj0dlxkAmiqJlRon3G LHYIp4dRYuucHWwQVdYSh49fBOtgFuCTmLRtOjMkCHglOtqEIEo8JO61f2WF+G0io0Tf17PM ExglFjAyrGIUTy0tzk1PLTbOSy3XK07MLS7NS9dLzs/dxAiMvtP/jn/dwbjvT9IhRgEORiUe 3hUZqTFCrIllxZW5hxglOJiVRHg516TFCPGmJFZWpRblxxeV5qQWH2KU5mBREuetZngQLSSQ nliSmp2aWpBaBJNl4uCUamC0eKf4d+H7ifzWKyfIJL2tXJdi/edWu+fW5mOHlnzg2eqtcIZl yyLHmBlPWrcenvff59nioLi1FWa/cqe2fwhXmbrJIMmbt49D6vw+g6xzR9OOPLlzau4aLqkz f9fvTb5y7+jNix77fXMDNKLWVGwo/FLu3rVW4Ou0Y5J99yLO/AxxFJh1j8vXQImlOCPRUIu5 qDgRAI0GTz66AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnluLIzCtJLcpLzFFi42I5/e/4NV2JbWkxBosP81hsnLGe1eL6l+es FvM+y1qcP7+B3WLT42usFjPO72OyWHvkLrvF5k1TmR04PDat6mTzuHNtD5vHu3Pn2D02L6n3 6NuyitHj8ya5ALYoLpuU1JzMstQifbsEroxbv9qZCjpEKm6/28DcwLhDoIuRk0NCwETi9vJD jF2MXBxCAksYJabf38AKkhASaGKS6JglAWKzCRhKdL3tYgOxRQS8JSaf+csO0sAs0MMk0X71 NztIQljAU2L2jTawIhYBVYlvR+axgNi8ArYSGz9eZoXYJi+xesMBZhCbU8BOYs2aHmaIZbYS l1c9YJzAyLOAkWEVo0hqaXFuem6xoV5xYm5xaV66XnJ+7iZGYDBtO/Zz8w7GSxuDDzEKcDAq 8fCuyEiNEWJNLCuuzD3EKMHBrCTCy7kmLUaINyWxsiq1KD++qDQntfgQozQHi5I473mDyigh gfTEktTs1NSC1CKYLBMHp1QDY2f2uplpMhfcCh2XXxC/EHeJo/BefUChbMnh/bcCPXRK3X+c bDI9sVXzcMHL8h/aDlInDs/hOXE39lTm0n+rhS//OM59d/nR8sTXNbnT3+0z1f2aGz5j+wX9 6HfChhoJlno7FBf2yh1iS1lkcPnwlD+P91x8MfHnuo0ht5POe1zy6JR0fji1/LUSS3FGoqEW c1FxIgCLZcC+IgIAAA== X-CMS-MailID: 20190215125240eucas1p277671ab6d0eb4d1102d3cddd6c61c255 CMS-TYPE: 201P X-CMS-RootMailID: 20190215125240eucas1p277671ab6d0eb4d1102d3cddd6c61c255 References: <20190215125229.30180-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org All CortexA7/A15 based Exynos SoCs have ARM architected timers, so enable support for them directly in the base dtsi for Exynos3250, Exynos5250 and Exynos54xx SoCs. None of the known firmware properly configures arch timer registers, so mark them as not-fw-configured and set frequency to 24MHz, which is the only configuration supported by the remaining drivers (clocks) so far. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos3250.dtsi | 10 ++++++++++ arch/arm/boot/dts/exynos5250.dtsi | 1 + arch/arm/boot/dts/exynos54xx.dtsi | 10 ++++++++++ 3 files changed, 21 insertions(+) -- 2.17.1 diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 608d17454179..3966e7960964 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -134,6 +134,16 @@ }; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + clock-frequency = <24000000>; + arm,cpu-registers-not-fw-configured; + }; + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x40000>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 80986b97dfe5..95af4050f69d 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -239,6 +239,7 @@ * so we need the value from DT. */ clock-frequency = <24000000>; + arm,cpu-registers-not-fw-configured; }; mct@101c0000 { diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index de26e5ee0d2d..45e06717ee51 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -46,6 +46,16 @@ status = "disabled"; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + arm,cpu-registers-not-fw-configured; + clock-frequency = <24000000>; + }; + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x54000>;