diff mbox series

[v4,8/8] target/arm: Enable ARMv8.2-FHM for -cpu max

Message ID 20190215192302.27855-9-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Implement ARMv8.3-JSConv & ARMv8.2-FHM | expand

Commit Message

Richard Henderson Feb. 15, 2019, 7:23 p.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu.c   | 1 +
 target/arm/cpu64.c | 2 ++
 2 files changed, 3 insertions(+)

-- 
2.17.2

Comments

Peter Maydell Feb. 19, 2019, 5:13 p.m. UTC | #1
On Fri, 15 Feb 2019 at 19:23, Richard Henderson
<richard.henderson@linaro.org> wrote:
>

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/cpu.c   | 1 +

>  target/arm/cpu64.c | 2 ++

>  2 files changed, 3 insertions(+)

>

> diff --git a/target/arm/cpu.c b/target/arm/cpu.c

> index 8ea6569088..b9fa548718 100644

> --- a/target/arm/cpu.c

> +++ b/target/arm/cpu.c

> @@ -2003,6 +2003,7 @@ static void arm_max_initfn(Object *obj)

>              t = cpu->isar.id_isar6;

>              t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1);

>              t = FIELD_DP32(t, ID_ISAR6, DP, 1);

> +            t = FIELD_DP32(t, ID_ISAR6, FHM, 1);

>              cpu->isar.id_isar6 = t;

>

>              t = cpu->id_mmfr4;

> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c

> index 69e4134f79..1b0c427277 100644

> --- a/target/arm/cpu64.c

> +++ b/target/arm/cpu64.c

> @@ -308,6 +308,7 @@ static void aarch64_max_initfn(Object *obj)

>          t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1);

>          t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1);

>          t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1);

> +        t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1);

>          cpu->isar.id_aa64isar0 = t;

>

>          t = cpu->isar.id_aa64isar1;

> @@ -347,6 +348,7 @@ static void aarch64_max_initfn(Object *obj)

>          u = cpu->isar.id_isar6;

>          u = FIELD_DP32(u, ID_ISAR6, JSCVT, 1);

>          u = FIELD_DP32(u, ID_ISAR6, DP, 1);

> +        u = FIELD_DP32(u, ID_ISAR6, FHM, 1);

>          cpu->isar.id_isar6 = u;

>

>          /*


Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


We also need to set the HWCAP_ASIMDFHM and HWCAP_JSCVT hwcaps
for linux-user based on the ID regs, but we can do that as
an extra patch on top of this set.

thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 8ea6569088..b9fa548718 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2003,6 +2003,7 @@  static void arm_max_initfn(Object *obj)
             t = cpu->isar.id_isar6;
             t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1);
             t = FIELD_DP32(t, ID_ISAR6, DP, 1);
+            t = FIELD_DP32(t, ID_ISAR6, FHM, 1);
             cpu->isar.id_isar6 = t;
 
             t = cpu->id_mmfr4;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 69e4134f79..1b0c427277 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -308,6 +308,7 @@  static void aarch64_max_initfn(Object *obj)
         t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1);
         t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1);
         t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1);
+        t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1);
         cpu->isar.id_aa64isar0 = t;
 
         t = cpu->isar.id_aa64isar1;
@@ -347,6 +348,7 @@  static void aarch64_max_initfn(Object *obj)
         u = cpu->isar.id_isar6;
         u = FIELD_DP32(u, ID_ISAR6, JSCVT, 1);
         u = FIELD_DP32(u, ID_ISAR6, DP, 1);
+        u = FIELD_DP32(u, ID_ISAR6, FHM, 1);
         cpu->isar.id_isar6 = u;
 
         /*