[2/4] ARM: exynos: Add Exynos SMC values for secure memory write

Message ID 20190218143412.6865-3-m.szyprowski@samsung.com
State New
Headers show
Series
  • Odroid XU3/4: add system suspend/resume support
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Commit Message

Marek Szyprowski Feb. 18, 2019, 2:34 p.m.
Add defines for the (secure)-memory write for Exynos Secure Monitor
Call. The values comes from the vendor kernel.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 arch/arm/mach-exynos/smc.h | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.17.1

Comments

Krzysztof Kozlowski Feb. 19, 2019, 11:19 a.m. | #1
On Mon, 18 Feb 2019 at 15:34, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>

> Add defines for the (secure)-memory write for Exynos Secure Monitor

> Call. The values comes from the vendor kernel.

>

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm/mach-exynos/smc.h | 7 +++++++

>  1 file changed, 7 insertions(+)

>

> diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h

> index f355185d4239..e523e9604ffc 100644

> --- a/arch/arm/mach-exynos/smc.h

> +++ b/arch/arm/mach-exynos/smc.h

> @@ -25,6 +25,13 @@

>  #define SMC_CMD_L2X0INVALL     (-24)

>  #define SMC_CMD_L2X0DEBUG      (-25)

>

> +/* For Accessing CP15/SFR (General) */

> +#define SMC_CMD_REG            (-101)

> +

> +/* defines for SMC_CMD_REG */

> +#define SMC_REG_CLASS_SFR_W    (0x1 << 30)

> +#define SMC_REG_ID_SFR_W(ADDR) (SMC_REG_CLASS_SFR_W | ((ADDR) >> 2))


Lowercase ADDR. If you are not going to resend entire set for some
other reason, I can fix it while applying.

Best Regards,
Krzysztof
Krzysztof Kozlowski March 19, 2019, 8:10 p.m. | #2
On Mon, Feb 18, 2019 at 03:34:10PM +0100, Marek Szyprowski wrote:
> Add defines for the (secure)-memory write for Exynos Secure Monitor

> Call. The values comes from the vendor kernel.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm/mach-exynos/smc.h | 7 +++++++


Thanks, applied.

Best regards,
Krzysztof

Patch

diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h
index f355185d4239..e523e9604ffc 100644
--- a/arch/arm/mach-exynos/smc.h
+++ b/arch/arm/mach-exynos/smc.h
@@ -25,6 +25,13 @@ 
 #define SMC_CMD_L2X0INVALL	(-24)
 #define SMC_CMD_L2X0DEBUG	(-25)
 
+/* For Accessing CP15/SFR (General) */
+#define SMC_CMD_REG		(-101)
+
+/* defines for SMC_CMD_REG */
+#define SMC_REG_CLASS_SFR_W	(0x1 << 30)
+#define SMC_REG_ID_SFR_W(ADDR)	(SMC_REG_CLASS_SFR_W | ((ADDR) >> 2))
+
 #ifndef __ASSEMBLY__
 
 extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);