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Mon, 18 Feb 2019 14:34:22 +0000 (GMT) X-AuditID: cbfec7f4-84fff700000010c6-01-5c6ac26e9878 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 32.13.04128.E62CA6C5; Mon, 18 Feb 2019 14:34:22 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PN400ECCLT2NV10@eusync1.samsung.com>; Mon, 18 Feb 2019 14:34:22 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Joonyoung Shim , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz , Seung-Woo Kim Subject: [PATCH 3/4] ARM: exynos: Add CPU state management for Exynos542x under secure firmware Date: Mon, 18 Feb 2019 15:34:11 +0100 Message-id: <20190218143412.6865-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20190218143412.6865-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMIsWRmVeSWpSXmKPExsWy7djP87p5h7JiDH4tMbbYOGM9q8X1L89Z LV7cu8hicf78BnaLGef3MVmsPXIXyJr8ks2B3WPTqk42j74tqxg9Pm+SC2CO4rJJSc3JLEst 0rdL4Mr4PJG7YL5sxYb+dYwNjHskuhg5OSQETCTuzvjL3sXIxSEksIJRYu+PLmYI5zOjRP/T 98wwVRsOTWMHsYUEljFKHLqsBFHUwCTR1fGVDSTBJmAo0fW2C8wWEVCV+Ny2AGwss0AXk0Tb zumsIAlhgUSJb0fPgE1lASp6fr8DqIiDg1fARuL5/zSIZfISqzccACvhFLCV2N67iQVkjoTA R1aJ81+XMUIUuUj0T9oNZctIXJ7cDVXUzCjRPmMWO4TTwyixdc4ONogqa4nDxy+CXcEswCcx adt0ZpDNEgK8Eh1tQhAlHhKrj05jhXhtAqPEv01L2YHUAkaGVYziqaXFuempxUZ5qeV6xYm5 xaV56XrJ+bmbGIFRdfrf8S87GHf9STrEKMDBqMTDu2B5VowQa2JZcWXuIUYJDmYlEd5TB4BC vCmJlVWpRfnxRaU5qcWHGKU5WJTEeasZHkQLCaQnlqRmp6YWpBbBZJk4OKUaGIXPfbj286L7 ZCnxHyuv7RAsvM+gXj5hTh/Lh+jHHx+FTPi+cmZDWc/Zo6c3S3fxuzxhmmTPxvohq95w7eJv PtUP+IXs9hwL/G+7IiIi527r9od28wQr7ulK2j38KlfpuPWQ5Sv5rZZ8RfeNy125m9Rzjzyb 9SarYpnBvBnTruyNENv98rxRoLMSS3FGoqEWc1FxIgAWvvgKpgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNJMWRmVeSWpSXmKPExsVy+t/xy7p5h7JiDM68F7HYOGM9q8X1L89Z LV7cu8hicf78BnaLGef3MVmsPXIXyJr8ks2B3WPTqk42j74tqxg9Pm+SC2CO4rJJSc3JLEst 0rdL4Mr4PJG7YL5sxYb+dYwNjHskuhg5OSQETCQ2HJrG3sXIxSEksIRRomVWB5TTxCTx/vNr dpAqNgFDia63XWwgtoiAqsTntgVgRcwCPUwS9z89YgFJCAskShx98osVxGYBKnp+H2QSBwev gI3E8/9pENvkJVZvOMAMYnMK2Eps793EAlIiBFSyeln1BEaeBYwMqxhFUkuLc9Nzi430ihNz i0vz0vWS83M3MQKDZNuxn1t2MHa9Cz7EKMDBqMTDu2B5VowQa2JZcWXuIUYJDmYlEd5TB4BC vCmJlVWpRfnxRaU5qcWHGKU5WJTEec8bVEYJCaQnlqRmp6YWpBbBZJk4OKUaGKOWVpzY9pAz xjR085og2Vrec45Xf6ov37eyabXXli3tp4slJlbyq9w4VGzy5nXyOhahX0LHeBUO7Yw4+OXF W6c9t8TlYoLEjFlmyd235H2fXBvwt1GmtVgkVHZuh8faQgH/Up3pc/J2Joka3ng2W+mm+BGn 3bscFtxRurRpnWb78+vr1u3YdE6JpTgj0VCLuag4EQDD0nRkDgIAAA== X-CMS-MailID: 20190218143422eucas1p124376d6ed4751c715e5f1fb207ca8bfd CMS-TYPE: 201P X-CMS-RootMailID: 20190218143422eucas1p124376d6ed4751c715e5f1fb207ca8bfd References: <20190218143412.6865-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Joonyoung Shim Add required CPU state management done via secure monitor call for Exynos542x running unsed Secure Firmware. Signed-off-by: Joonyoung Shim [mszyprow: rewrote code to use defines and sysram base address instead of the magic numbers, added second smc call in pm_resume, rephrased subject and commit message] Signed-off-by: Marek Szyprowski --- arch/arm/mach-exynos/common.h | 1 + arch/arm/mach-exynos/exynos.c | 3 +++ arch/arm/mach-exynos/suspend.c | 17 +++++++++++++++-- 3 files changed, 19 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 1b8699e94098..c93356a8d662 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -91,6 +91,7 @@ extern u32 cp15_save_power; extern void __iomem *sysram_ns_base_addr; extern void __iomem *sysram_base_addr; +extern phys_addr_t sysram_base_phys; extern void __iomem *pmu_base_addr; void exynos_sysram_init(void); diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 865dcc4c3181..9aa483366ebc 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -33,6 +33,7 @@ static struct platform_device exynos_cpuidle = { }; void __iomem *sysram_base_addr __ro_after_init; +phys_addr_t sysram_base_phys __ro_after_init; void __iomem *sysram_ns_base_addr __ro_after_init; void __init exynos_sysram_init(void) @@ -43,6 +44,8 @@ void __init exynos_sysram_init(void) if (!of_device_is_available(node)) continue; sysram_base_addr = of_iomap(node, 0); + sysram_base_phys = of_translate_address(node, + of_get_address(node, 0, NULL, NULL)); break; } diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index c1e082ab2a1e..3ac84f621d99 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -31,6 +31,7 @@ #include #include "common.h" +#include "smc.h" #define REG_TABLE_END (-1U) @@ -62,6 +63,8 @@ struct exynos_pm_state { int cpu_state; unsigned int pmu_spare3; void __iomem *sysram_base; + phys_addr_t sysram_phys; + bool secure_firmware; }; static const struct exynos_pm_data *pm_data __ro_after_init; @@ -340,6 +343,9 @@ static void exynos5420_pm_prepare(void) pm_state.cpu_state = readl_relaxed(pm_state.sysram_base + EXYNOS5420_CPU_STATE); writel_relaxed(0x0, pm_state.sysram_base + EXYNOS5420_CPU_STATE); + if (pm_state.secure_firmware) + exynos_smc(SMC_CMD_REG, SMC_REG_ID_SFR_W(pm_state.sysram_phys + + EXYNOS5420_CPU_STATE), 0, 0); exynos_pm_enter_sleep_mode(); @@ -459,6 +465,10 @@ static void exynos5420_pm_resume(void) /* Restore the sysram cpu state register */ writel_relaxed(pm_state.cpu_state, pm_state.sysram_base + EXYNOS5420_CPU_STATE); + if (pm_state.secure_firmware) + exynos_smc(SMC_CMD_REG, SMC_REG_ID_SFR_W(pm_state.sysram_phys + + EXYNOS5420_CPU_STATE), + EXYNOS_AFTR_MAGIC, 0); pmu_raw_writel(EXYNOS5420_USE_STANDBY_WFI_ALL, S5P_CENTRAL_SEQ_OPTION); @@ -658,8 +668,11 @@ void __init exynos_pm_init(void) * Applicable as of now only to Exynos542x. If booted under secure * firmware, the non-secure region of sysram should be used. */ - if (exynos_secure_firmware_available()) + if (exynos_secure_firmware_available()) { + pm_state.sysram_phys = sysram_base_phys; pm_state.sysram_base = sysram_ns_base_addr; - else + pm_state.secure_firmware = true; + } else { pm_state.sysram_base = sysram_base_addr; + } }