| Message ID | 20190307144126.31847-10-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Add tcg_gen_extract2_{i32,i64} | expand |
On 3/7/19 3:41 PM, Richard Henderson wrote: > The mask implied by the extract is redundant with the one > implied by the deposit. Also, fix spelling of BFXIL. This spelling fix also help understanding the context! > > Cc: qemu-arm@nongnu.org > Cc: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate-a64.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index 54fe94c436..39e0512d21 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) > tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); > return; > } > - /* opc == 1, BXFIL fall through to deposit */ > - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); > + /* opc == 1, BFXIL fall through to deposit */ > + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); > pos = 0; > } else { > /* Handle the ri > si case with a deposit > @@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) > len = ri; > } > > - if (opc == 1) { /* BFM, BXFIL */ > + if (opc == 1) { /* BFM, BFXIL */ > tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); Fall through and use deposit of len indeed. So the previous SHRI is enough. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> This function uses hardcore optimizations btw, un chef d'oeuvre :) > } else { > /* SBFM or UBFM: We start with zero, and we haven't modified >
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 54fe94c436..39e0512d21 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); return; } - /* opc == 1, BXFIL fall through to deposit */ - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); + /* opc == 1, BFXIL fall through to deposit */ + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); pos = 0; } else { /* Handle the ri > si case with a deposit @@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) len = ri; } - if (opc == 1) { /* BFM, BXFIL */ + if (opc == 1) { /* BFM, BFXIL */ tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); } else { /* SBFM or UBFM: We start with zero, and we haven't modified
The mask implied by the extract is redundant with the one implied by the deposit. Also, fix spelling of BFXIL. Cc: qemu-arm@nongnu.org Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate-a64.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.2