[edk2,edk2-platforms,v3,10/18] Hisilicon/D06: Use HCCS speed with 2.6G

Message ID 20190320080829.52003-11-ming.huang@linaro.org
State New
Headers show
Series
  • Fix issues and improve D0x
Related show

Commit Message

Ming Huang March 20, 2019, 8:08 a.m.
Follow chip team suggestion, HCCS(Huawei Cache-Coherent System)
may be unstable while speed is 3.0G, so use 2.6G to avoid some
unstable stress issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <ming.huang@linaro.org>

---
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++
 1 file changed, 8 insertions(+)

-- 
2.9.5

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Patch

diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index c8f71ecf890a..758157525f40 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -222,3 +222,11 @@  UINTN OemGetCpuFreq (UINT8 Socket)
   }
 }
 
+UINTN
+OemGetHccsFreq (
+  VOID
+  )
+{
+  return HCCS_PLL_VALUE_2600;
+}
+