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[ARM] Actually generate vorn and vbic instructions.

Message ID 4DDD1675.8010008@linaro.org
State Accepted
Headers show

Commit Message

Ramana Radhakrishnan May 25, 2011, 2:47 p.m. UTC 
Hi,

A co-worker pointed out that we weren't generating vorn and vbic 
instructions for Neon and I had a look.

Tests are still running and will commit to trunk if there are no 
regressions.

cheers
Ramana

2011-05-25  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

         * config/arm/neon.md ("orn<mode>3_neon"): Canonicalize not.
         ("orndi3_neon"): Likewise.
         ("bic<mode>3_neon"): Likewise.

2011-05-25  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* gcc.target/arm/neon-vorn-vbic.c: New file.
diff mbox

Patch

Index: gcc/config/arm/neon.md
===================================================================
--- gcc/config/arm/neon.md	(revision 174174)
+++ gcc/config/arm/neon.md	(working copy)
@@ -794,8 +794,8 @@ 
 
 (define_insn "orn<mode>3_neon"
   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
-	(ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
-		 (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
+	(ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
+		 (match_operand:VDQ 1 "s_register_operand" "w")))]
   "TARGET_NEON"
   "vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set_attr "neon_type" "neon_int_1")]
@@ -803,8 +803,8 @@ 
 
 (define_insn "orndi3_neon"
   [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
-	(ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0")
-	         (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))]
+	(ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))
+		(match_operand:DI 1 "s_register_operand" "w,r,0")))]
   "TARGET_NEON"
   "@
    vorn\t%P0, %P1, %P2
@@ -816,8 +816,8 @@ 
 
 (define_insn "bic<mode>3_neon"
   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
-	(and:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
-		  (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
+	(and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
+		 (match_operand:VDQ 1 "s_register_operand" "w")))]
   "TARGET_NEON"
   "vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set_attr "neon_type" "neon_int_1")]
--- /dev/null	2011-05-18 14:49:12.916256701 +0100
+++ ./gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c	2011-05-25 11:17:09.966726432 +0100
@@ -0,0 +1,20 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-add-options arm_neon } */
+
+void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
+{
+  int i;
+  for (i=0;i<9;i++)
+    c[i] = b[i] | (~a[i]);
+}
+void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
+{
+  int i;
+  for (i=0;i<9;i++)
+    c[i] = b[i] & (~a[i]);
+}
+
+/* { dg-final { scan-assembler "vorn\\t" } } */
+/* { dg-final { scan-assembler "vbic\\t" } } */