From patchwork Mon Mar 25 09:39:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 161061 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3750180jan; Mon, 25 Mar 2019 02:43:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqyNjObq4CYM1o0Bggz3hOgxrMQojd3rWOStRe2mViuul8QvH/BoHWFTwtW84v3lwl9p5Kgi X-Received: by 2002:a62:70c9:: with SMTP id l192mr23211410pfc.207.1553506989678; Mon, 25 Mar 2019 02:43:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553506989; cv=none; d=google.com; s=arc-20160816; b=ddZzlcPoeuGPLmMlf8yaNzrX8VS6wCotuJBlt6Zdd01DVSckJXS3+bX0ku2ic+re7U FmIWcFo/OVVYeMAWx6E8nRmxR5nSGE07mIioDVIUIgu1Ze4UeYu0IOE43hynBJDPFgnG hVy4Gje+mG+i58NkiIp9Bs6lAd236O8/XcuyATk7+ie3J26KyLohyrhYHGIEs6gOUxbb Z9AElK1NHz1tM6p8NkdFu4czPIfVcIUqPKIw9yZ7wuUOwpLdMzHSbLN4AYxEXnZuIoan 6vtjqnEbg0QMMaOcuPXYTlfNMZIHDJL/axnr+abzHsRSBiZhZHJjYSHntrOGNqwUQhvU kjfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=1lGjasujhkFf/3ytOeLr0WSkR7aiRJac7oOtRyOLFg4=; b=aftPrXTz6R2Cx07g0STiMoLfVPNwpCYQhn+nqACicqnQAx7dmvs21PHd7miv/HsRlM txV6Wl//01914xnWmmEXUeZz+JFCl/E14Dijz7S1MtoJZdOmGBOb5mm0ULsbNfD2Sral pOXn98BHqHn7uTGH7kLOy7gbXbaBAJfRe7NZSSb0rrNyJA+KASGQ79kQcFv3xGrxRKKQ 3wZtsJiQaLMU7HD+fVKrwfpCkwTZH+gCUzZsAf15xo+AdDfwmHFbFEyadZnWwr/5Qzl0 m82JZxn2Mdb6igw93RJW3SDG1o5UyT+a4tXHvBCbLeJnwdXS91foa4Oved5eVXfXythU 7Myw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=iV9eDIFf; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z4si12870402pgu.375.2019.03.25.02.43.09; Mon, 25 Mar 2019 02:43:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=iV9eDIFf; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730423AbfCYJnI (ORCPT + 5 others); Mon, 25 Mar 2019 05:43:08 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:33380 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730387AbfCYJnI (ORCPT ); Mon, 25 Mar 2019 05:43:08 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2P9gUIM010585; Mon, 25 Mar 2019 04:42:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553506950; bh=1lGjasujhkFf/3ytOeLr0WSkR7aiRJac7oOtRyOLFg4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iV9eDIFfRaymmCx+e9840Cb4kWsWCsSqXSZ6eAPwSzS0BCCVfcMN2Gy+pAsVy1XCE vIZbZKmu8tzLEL+iNZKD3X+2I+U+EoBCTwzP9NcM0uzRwnwAf3VxNXzRiGCq2ZinMd 7JWBVBG3bYzBSowxiLlK+dLwwbEBqnxpsNzS9l8Y= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2P9gUci053184 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Mar 2019 04:42:30 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 25 Mar 2019 04:42:29 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Mon, 25 Mar 2019 04:42:29 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2P9feaN028077; Mon, 25 Mar 2019 04:42:24 -0500 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Arnd Bergmann , Murali Karicheri CC: Kishon Vijay Abraham I , Jingoo Han , Greg Kroah-Hartman , , , , , , , Minghuan Lian , Mingkai Hu , Roy Zang , Jesper Nilsson Subject: [PATCH v3 08/26] PCI: keystone: Explicitly set the PCIe mode Date: Mon, 25 Mar 2019 15:09:29 +0530 Message-ID: <20190325093947.32633-9-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190325093947.32633-1-kishon@ti.com> References: <20190325093947.32633-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Explicitly set the PCIe mode to BOOTCFG_DEVCFG instead of always relying on the default values. This is required when EP mode has to be explicitly written to BOOTCFG_DEVCFG register. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 37 +++++++++++++++++++++++ 1 file changed, 37 insertions(+) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 95997885a05c..dfe54553d832 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -79,6 +79,15 @@ #define PCIE_RC_K2L 0xb00a #define PCIE_RC_K2G 0xb00b +#define KS_PCIE_DEV_TYPE_MASK (0x3 << 1) +#define KS_PCIE_DEV_TYPE(mode) ((mode) << 1) + +#define EP 0x0 +#define LEG_EP 0x1 +#define RC 0x2 + +#define KS_PCIE_SYSCLOCKOUTEN BIT(0) + #define to_keystone_pcie(x) dev_get_drvdata((x)->dev) struct keystone_pcie { @@ -876,6 +885,30 @@ static int ks_pcie_enable_phy(struct keystone_pcie *ks_pcie) return ret; } +static int ks_pcie_set_mode(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct regmap *syscon; + u32 val; + u32 mask; + int ret = 0; + + syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); + if (IS_ERR(syscon)) + return 0; + + mask = KS_PCIE_DEV_TYPE_MASK | KS_PCIE_SYSCLOCKOUTEN; + val = KS_PCIE_DEV_TYPE(RC) | KS_PCIE_SYSCLOCKOUTEN; + + ret = regmap_update_bits(syscon, 0, mask, val); + if (ret) { + dev_err(dev, "failed to set pcie mode\n"); + return ret; + } + + return 0; +} + static int __init ks_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -988,6 +1021,10 @@ static int __init ks_pcie_probe(struct platform_device *pdev) goto err_get_sync; } + ret = ks_pcie_set_mode(dev); + if (ret < 0) + goto err_get_sync; + ret = ks_pcie_add_pcie_port(ks_pcie, pdev); if (ret < 0) goto err_get_sync;