[edk2,edk2-platforms,v4,3/3] Hisilicon/D06: Add Setup Item "Support DPC"

Message ID 20190325150829.24520-4-ming.huang@linaro.org
State New
Headers show
Series
  • Fix issues and improve D0x
Related show

Commit Message

Ming Huang March 25, 2019, 3:08 p.m.
Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <ming.huang@linaro.org>

---
 Silicon/Hisilicon/Include/Library/OemConfigData.h                   | 1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr      | 2 --
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c           | 4 ++++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr        | 3 +++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 3 ++-
 5 files changed, 10 insertions(+), 3 deletions(-)

-- 
2.9.5

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Patch

diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h b/Silicon/Hisilicon/Include/Library/OemConfigData.h
index f120e3123c83..c0097d0829f0 100644
--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
+++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
@@ -49,6 +49,7 @@  typedef struct {
   UINT8         OSWdtAction;
   /*PCIe Config*/
   UINT8         PcieSRIOVSupport;
+  UINT8         PcieDPCSupport;
   UINT8         PciePort[PCIE_MAX_TOTAL_PORTS];
   UINT8         PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
   UINT8         PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 08236704fbfe..93ccb99bdc67 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -62,11 +62,9 @@  formset
       prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
       help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
 
-    suppressif TRUE;
     goto PCIE_CONFIG_FORM_ID,
       prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
       help    = STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
-    endif;
 
     goto MISC_CONFIG_FORM_ID,
       prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 6668103af027..be4ce8820f73 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -290,6 +290,10 @@  OemConfigUiLibConstructor (
       Configuration.OSWdtTimeout = 5;
       Configuration.OSWdtAction = 1;
       //
+      //Set the default value of the PCIe option
+      //
+      Configuration.PcieDPCSupport = 0;
+      //
       //Set the default value of the Misc option
       //
       Configuration.EnableSmmu = 1;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
index f700699b093b..c65907fe846e 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
@@ -17,6 +17,9 @@ 
 form formid = PCIE_CONFIG_FORM_ID,
   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
 
+  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
+        prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
+        help     = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
         option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED;
         option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = RESET_REQUIRED;
   endoneof;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
index d87d30f975b8..0127ea952dee 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
@@ -26,7 +26,8 @@ 
 #string STR_PCIE_CPU_1_PROMPT           #language en-US "CPU 1 PCIE Configuration"
 #string STR_SRIOV_SUPPORT_PROMPT        #language en-US "SRIOV"
 #string STR_SRIOV_SUPPORT_HELP          #language en-US "This option enables / disables the SRIOV function"
-
+#string STR_DPC_SUPPORT_PROMPT          #language en-US "Support DPC"
+#string STR_DPC_SUPPORT_HELP            #language en-US "This option enables / disables the DPC function"
 #string STR_PCIE_PORT_PROMPT_HELP       #language en-US "Press <Enter> to config this port."
 #string STR_PCIE_PORT_0_NULL_PROMPT     #language en-US ""
 #string STR_PCIE_PORT_0_PROMPT          #language en-US "CPU 0 Pcie - Port 0"