From patchwork Wed Mar 27 18:45:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 161278 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp6829003jan; Wed, 27 Mar 2019 11:47:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqxlALBntV/qlPFhx7sW0z9FuweJ8t+XwqymCZcy+BQlIEX7AHMpN19msPHj/wNUGG4ldirt X-Received: by 2002:a25:105:: with SMTP id 5mr6684992ybb.501.1553712449493; Wed, 27 Mar 2019 11:47:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553712449; cv=none; d=google.com; s=arc-20160816; b=FhGjxrc3VVQ38vDr5S0LFnzAVC8cw0VMtPWsX5L6sdLSn3RXk6jFg+bnUKXfwe9Kwa Ra7/xij5sZaDR2L/0h5NoYWekwyFhxC7sEOADahX08cTIEkLA2RzvMkmfsjxLsgkQ6BL Np9kfORWhFaggSZH61SB9s1g+W/asknS58d7k4V1IC5kVC3fu+pM1G+cB71k6WIQCA64 7S138Ethm5AWxQLv6tvIICIN/V4fRAFRAmAdUG8pdr14XSrX/cMLj1gIzgv5yfRXcjnq uUdGsiMSf2rA4nWrsnHk/KQ27EMQDniLPs322N7xEvcZkxmifKhOEs0FqCn5l7BwMT23 9bJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=dhU2nKYyW2ll/sQn1c8uOrfMqpVg6UAxUKqCLzYSC7A=; b=ygPwZbo6AESTLHbcO7jEGNGLgXV84TvJLfF4mkhUAfXBDftlGOfpz3YSynS2ts0lHK GPeGqkF6qL6fvvNQrWyTVw//4KNWUqOs/E0YsX5Ic5CGU9MGXiSVQ2nHgMP6byU33NXc sOc1fPMk6iP+VpBMC4Co3e08T52T9dUDtzpensI5nFWZeoZxy8wAuHtdRqt4wHrLD0Ao OPfnWMqGTjbvn2W2YDjyer+0ec2tdqMjX/rYiydac3qyNclAFMpNwqtHJfvtcigUP1Ui UFHri2zU589NktlevvgitIZOGPM3pfw3aBLl25KeHg8+8+gpVAu6HwqZGBbkDHt9v7O8 3c5g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id j185si6923110ywj.204.2019.03.27.11.47.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 27 Mar 2019 11:47:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h9DYh-0001kd-MV; Wed, 27 Mar 2019 18:45:55 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h9DYf-0001jl-KX for xen-devel@lists.xenproject.org; Wed, 27 Mar 2019 18:45:53 +0000 X-Inumbo-ID: 8c483d2e-50c0-11e9-af78-2ff39fb9a87f Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 8c483d2e-50c0-11e9-af78-2ff39fb9a87f; Wed, 27 Mar 2019 18:45:53 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0636A78; Wed, 27 Mar 2019 11:45:52 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7CD533F557; Wed, 27 Mar 2019 11:45:51 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 27 Mar 2019 18:45:26 +0000 Message-Id: <20190327184531.30986-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190327184531.30986-1-julien.grall@arm.com> References: <20190327184531.30986-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 07/12] xen/arm: cpuerrata: Match register size with value size in check_workaround_* X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Artem_Mygaiev@epam.com, Oleksandr_Tyshchenko@epam.com, Julien Grall , sstabellini@kernel.org, Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Clang is pickier than GCC for the register size in asm statement. It expects the register size to match the value size. The asm statement expects a 32-bit (resp. 64-bit) value on Arm32 (resp. Arm64) whereas the value is a boolean (Clang consider to be 32-bit). It would be possible to impose 32-bit register for both architecture but this require the code to use __OP32. However, it does not really improve the assembly generated. Instead, replace switch the variable to use register_t. Signed-off-by: Julien Grall --- xen/include/asm-arm/cpuerrata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/asm-arm/cpuerrata.h b/xen/include/asm-arm/cpuerrata.h index 55ddfda272..88ef3ca934 100644 --- a/xen/include/asm-arm/cpuerrata.h +++ b/xen/include/asm-arm/cpuerrata.h @@ -14,7 +14,7 @@ static inline bool check_workaround_##erratum(void) \ return false; \ else \ { \ - bool ret; \ + register_t ret; \ \ asm volatile (ALTERNATIVE("mov %0, #0", \ "mov %0, #1", \