[RESEND,01/20] dt-bindings: imx-ocotp: Add i.MX8MQ compatible

Message ID 20190413103305.9576-2-srinivas.kandagatla@linaro.org
State New
Headers show
  • nvmem: patches(set 1) for 5.2
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Commit Message

Srinivas Kandagatla April 13, 2019, 10:32 a.m.
From: Lucas Stach <l.stach@pengutronix.de>

Add compatible for i.MX8MQ and add i.MX7D/S, i.MX7ULP and i.M8MQ
to the description.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

 Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)



diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
index 7a999a135e56..68f7d6fdd140 100644
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
@@ -1,7 +1,8 @@ 
 Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
 This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ and i.MX6SLL SoCs.
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
+i.MX7D/S, i.MX7ULP and i.MX8MQ SoCs.
 Required properties:
 - compatible: should be one of
@@ -13,6 +14,7 @@  Required properties:
 	"fsl,imx7d-ocotp" (i.MX7D/S),
 	"fsl,imx6sll-ocotp" (i.MX6SLL),
 	"fsl,imx7ulp-ocotp" (i.MX7ULP),
+	"fsl,imx8mq-ocotp" (i.MX8MQ),
 	followed by "syscon".
 - #address-cells : Should be 1
 - #size-cells : Should be 1