diff mbox series

[20/26] target/arm: New helper function arm_v7m_mmu_idx_all()

Message ID 20190416125744.27770-21-peter.maydell@linaro.org
State Superseded
Headers show
Series target/arm: Implement M profile floating point | expand

Commit Message

Peter Maydell April 16, 2019, 12:57 p.m. UTC 
Add a new helper function which returns the MMU index to use
for v7M, where the caller specifies all of the security
state, privilege level and whether the execution priority
is negative, and reimplement the existing
arm_v7m_mmu_idx_for_secstate_and_priv() in terms of it.

We are going to need this for the lazy-FP-stacking code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
Suggestions for better function name welcome.
arm_v7m_mmu_idx_for_secstate_and_priv_and_negpri()
just seems way too long and unwieldy...
---
 target/arm/cpu.h    |  7 +++++++
 target/arm/helper.c | 14 +++++++++++---
 2 files changed, 18 insertions(+), 3 deletions(-)

-- 
2.20.1

Comments

Richard Henderson April 24, 2019, 12:12 a.m. UTC | #1 
On 4/16/19 5:57 AM, Peter Maydell wrote:
> Add a new helper function which returns the MMU index to use

> for v7M, where the caller specifies all of the security

> state, privilege level and whether the execution priority

> is negative, and reimplement the existing

> arm_v7m_mmu_idx_for_secstate_and_priv() in terms of it.

> 

> We are going to need this for the lazy-FP-stacking code.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

> Suggestions for better function name welcome.

> arm_v7m_mmu_idx_for_secstate_and_priv_and_negpri()

> just seems way too long and unwieldy...


Seems fine.

> ---

>  target/arm/cpu.h    |  7 +++++++

>  target/arm/helper.c | 14 +++++++++++---

>  2 files changed, 18 insertions(+), 3 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 500e0ab4c5d..0a1b82dc996 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2912,6 +2912,13 @@  static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
     }
 }
 
+/*
+ * Return the MMU index for a v7M CPU with all relevant information
+ * manually specified.
+ */
+ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env,
+                              bool secstate, bool priv, bool negpri);
+
 /* Return the MMU index for a v7M CPU in the specified security and
  * privilege state.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2feb3f664fe..c8e30b40366 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -13235,8 +13235,8 @@  int fp_exception_el(CPUARMState *env, int cur_el)
     return 0;
 }
 
-ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
-                                                bool secstate, bool priv)
+ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env,
+                              bool secstate, bool priv, bool negpri)
 {
     ARMMMUIdx mmu_idx = ARM_MMU_IDX_M;
 
@@ -13244,7 +13244,7 @@  ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
         mmu_idx |= ARM_MMU_IDX_M_PRIV;
     }
 
-    if (armv7m_nvic_neg_prio_requested(env->nvic, secstate)) {
+    if (negpri) {
         mmu_idx |= ARM_MMU_IDX_M_NEGPRI;
     }
 
@@ -13255,6 +13255,14 @@  ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
     return mmu_idx;
 }
 
+ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
+                                                bool secstate, bool priv)
+{
+    bool negpri = armv7m_nvic_neg_prio_requested(env->nvic, secstate);
+
+    return arm_v7m_mmu_idx_all(env, secstate, priv, negpri);
+}
+
 /* Return the MMU index for a v7M CPU in the specified security state */
 ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
 {