From patchwork Thu Apr 18 13:38:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 162469 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp759992jan; Thu, 18 Apr 2019 06:39:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqxfPxqirzeNvoBBNF6/KY1B+hxD9CLLDNQSsqogHuV39t3rHIBBoddyyx5PeKoUWa58e8Be X-Received: by 2002:a65:6392:: with SMTP id h18mr9662645pgv.273.1555594781766; Thu, 18 Apr 2019 06:39:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555594781; cv=none; d=google.com; s=arc-20160816; b=nbqoN2YCQC5mfXdBd4GROzbIJzobwsFK31d1HS5U/Xv6nSb4EeVt2L7jDUcJqUg7xy zMqDLaw8xuDbup2DA3epY8jz6KCiYF7VHUG8SRqUOWOFPFybLJZyNW7Am7mJ2fxfLDKq TcVZzsDowMo4LyhK2js6oG7NHnlpL7XN6dERaVzPoEsB3MTigZNBIysDqAH1HC92Usod J+qWdfvAFiJdDq1FjtDUv8EA8aEaFKNdZo9Yf6S7/F4YRP2N/OCnmdWYW4SfS366s8UR 8083gsL8COjBlIRFxZADp5jXEbKVsCKcOt4aD8L2hQAcERKpVC3pyvX3/jsvA4xe8pA9 GrJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KuypWi0+tYq0Ik6v+7+dZhsy0qirkIAEkX+wGvQrVec=; b=aTO0FCpoBNVyZn22Ky3f5wufQzNq0ha+S9hpNRx8/Ky8RzYKKYloWkNB1btI/RpvhX KdtmyQ/PM+pOnhp0u6begzoHk3iomw8UtsMjjioARY+/zN8hOZoecuZR6TQdzag0+6UY KXssFAiymdE9KdXyFnP0wyrOTLeRjaEiUmqtHRtWkEsRf9cUEO7/9t8bBdzo2SArfDcS rxfGpbQ05YF9lKy4habnymJftGjCoGHXtMQbYhQts3s6CMa4MycctId1wuc1hAOKKSMv hq4Rdv9VJKV6j4T1Pn9heO2qU19S4+DtB6h36AyoVhm2IP9hdl77ABbAjduYGEOe6w1h HHQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u190si1990834pgd.360.2019.04.18.06.39.41; Thu, 18 Apr 2019 06:39:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389198AbfDRNjk (ORCPT + 30 others); Thu, 18 Apr 2019 09:39:40 -0400 Received: from foss.arm.com ([217.140.101.70]:33462 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733192AbfDRNjj (ORCPT ); Thu, 18 Apr 2019 09:39:39 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8DE1D80D; Thu, 18 Apr 2019 06:39:38 -0700 (PDT) Received: from e110176-lin.kfn.arm.com (e110176-lin.kfn.arm.com [10.50.4.178]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 226A33F5AF; Thu, 18 Apr 2019 06:39:36 -0700 (PDT) From: Gilad Ben-Yossef To: Herbert Xu , "David S. Miller" Cc: Ofir Drang , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/35] crypto: ccree: move MLLI desc. before key load Date: Thu, 18 Apr 2019 16:38:38 +0300 Message-Id: <20190418133913.9122-4-gilad@benyossef.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190418133913.9122-1-gilad@benyossef.com> References: <20190418133913.9122-1-gilad@benyossef.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Refactor to move the descriptor copying the MLLI line to SRAM to before the key loading descriptor in preparation to the introduction of CPP later on. Signed-off-by: Gilad Ben-Yossef --- drivers/crypto/ccree/cc_cipher.c | 58 +++++++++++++++++++------------- 1 file changed, 35 insertions(+), 23 deletions(-) -- 2.21.0 diff --git a/drivers/crypto/ccree/cc_cipher.c b/drivers/crypto/ccree/cc_cipher.c index dcab96861d6f..e4398de3aa39 100644 --- a/drivers/crypto/ccree/cc_cipher.c +++ b/drivers/crypto/ccree/cc_cipher.c @@ -558,12 +558,38 @@ static void cc_setup_key_desc(struct crypto_tfm *tfm, } } -static void cc_setup_cipher_data(struct crypto_tfm *tfm, - struct cipher_req_ctx *req_ctx, - struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes, - void *areq, struct cc_hw_desc desc[], - unsigned int *seq_size) +static void cc_setup_mlli_desc(struct crypto_tfm *tfm, + struct cipher_req_ctx *req_ctx, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes, void *areq, + struct cc_hw_desc desc[], unsigned int *seq_size) +{ + struct cc_cipher_ctx *ctx_p = crypto_tfm_ctx(tfm); + struct device *dev = drvdata_to_dev(ctx_p->drvdata); + + if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { + /* bypass */ + dev_dbg(dev, " bypass params addr %pad length 0x%X addr 0x%08X\n", + &req_ctx->mlli_params.mlli_dma_addr, + req_ctx->mlli_params.mlli_len, + (unsigned int)ctx_p->drvdata->mlli_sram_addr); + hw_desc_init(&desc[*seq_size]); + set_din_type(&desc[*seq_size], DMA_DLLI, + req_ctx->mlli_params.mlli_dma_addr, + req_ctx->mlli_params.mlli_len, NS_BIT); + set_dout_sram(&desc[*seq_size], + ctx_p->drvdata->mlli_sram_addr, + req_ctx->mlli_params.mlli_len); + set_flow_mode(&desc[*seq_size], BYPASS); + (*seq_size)++; + } +} + +static void cc_setup_flow_desc(struct crypto_tfm *tfm, + struct cipher_req_ctx *req_ctx, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes, void *areq, + struct cc_hw_desc desc[], unsigned int *seq_size) { struct cc_cipher_ctx *ctx_p = crypto_tfm_ctx(tfm); struct device *dev = drvdata_to_dev(ctx_p->drvdata); @@ -600,21 +626,6 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, set_flow_mode(&desc[*seq_size], flow_mode); (*seq_size)++; } else { - /* bypass */ - dev_dbg(dev, " bypass params addr %pad length 0x%X addr 0x%08X\n", - &req_ctx->mlli_params.mlli_dma_addr, - req_ctx->mlli_params.mlli_len, - (unsigned int)ctx_p->drvdata->mlli_sram_addr); - hw_desc_init(&desc[*seq_size]); - set_din_type(&desc[*seq_size], DMA_DLLI, - req_ctx->mlli_params.mlli_dma_addr, - req_ctx->mlli_params.mlli_len, NS_BIT); - set_dout_sram(&desc[*seq_size], - ctx_p->drvdata->mlli_sram_addr, - req_ctx->mlli_params.mlli_len); - set_flow_mode(&desc[*seq_size], BYPASS); - (*seq_size)++; - hw_desc_init(&desc[*seq_size]); set_din_type(&desc[*seq_size], DMA_MLLI, ctx_p->drvdata->mlli_sram_addr, @@ -794,11 +805,12 @@ static int cc_cipher_process(struct skcipher_request *req, /* Setup IV and XEX key used */ cc_setup_state_desc(tfm, req_ctx, ivsize, nbytes, desc, &seq_len); + /* Setup MLLI line, if needed */ + cc_setup_mlli_desc(tfm, req_ctx, dst, src, nbytes, req, desc, &seq_len); /* Setup key */ cc_setup_key_desc(tfm, req_ctx, nbytes, desc, &seq_len); /* Data processing */ - cc_setup_cipher_data(tfm, req_ctx, dst, src, nbytes, req, desc, - &seq_len); + cc_setup_flow_desc(tfm, req_ctx, dst, src, nbytes, req, desc, &seq_len); /* STAT_PHASE_3: Lock HW and push sequence */