[04/38] tcg: Support cross-class moves without instruction support

Message ID 20190420073442.7488-5-richard.henderson@linaro.org
State Superseded
Headers show
Series
  • tcg vector improvements
Related show

Commit Message

Richard Henderson April 20, 2019, 7:34 a.m.
PowerPC Altivec does not support direct moves between vector registers
and general registers.  So when tcg_out_mov fails, we can use the
backing memory for the temporary to perform the move.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 tcg/tcg.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

-- 
2.17.1

Comments

David Hildenbrand April 23, 2019, 8:29 a.m. | #1
On 20.04.19 09:34, Richard Henderson wrote:
> PowerPC Altivec does not support direct moves between vector registers

> and general registers.  So when tcg_out_mov fails, we can use the

> backing memory for the temporary to perform the move.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  tcg/tcg.c | 25 ++++++++++++++++++++++---

>  1 file changed, 22 insertions(+), 3 deletions(-)

> 

> diff --git a/tcg/tcg.c b/tcg/tcg.c

> index b083faacd2..d3dcfe3dca 100644

> --- a/tcg/tcg.c

> +++ b/tcg/tcg.c

> @@ -3373,7 +3373,18 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)

>                                           ots->indirect_base);

>              }

>              if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) {

> -                abort();

> +                /* Cross register class move not supported.

> +                   Store the source register into the destination slot

> +                   and leave the destination temp as TEMP_VAL_MEM.  */

> +                assert(!ots->fixed_reg);

> +                if (!ts->mem_allocated) {

> +                    temp_allocate_frame(s, ots);

> +                }

> +                tcg_out_st(s, ts->type, ts->reg,

> +                           ots->mem_base->reg, ots->mem_offset);

> +                ots->mem_coherent = 1;

> +                temp_free_or_dead(s, ots, -1);

> +                return;

>              }

>          }

>          ots->val_type = TEMP_VAL_REG;

> @@ -3475,7 +3486,11 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)

>              reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,

>                                  o_preferred_regs, ts->indirect_base);

>              if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {

> -                abort();

> +                /* Cross register class move not supported.  Sync the

> +                   temp back to its slot and load from there.  */

> +                temp_sync(s, ts, i_allocated_regs, 0, 0);

> +                tcg_out_ld(s, ts->type, reg,

> +                           ts->mem_base->reg, ts->mem_offset);

>              }

>          }

>          new_args[i] = reg;

> @@ -3634,7 +3649,11 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)

>                  if (ts->reg != reg) {

>                      tcg_reg_free(s, reg, allocated_regs);

>                      if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {

> -                        abort();

> +                        /* Cross register class move not supported.  Sync the

> +                           temp back to its slot and load from there.  */

> +                        temp_sync(s, ts, allocated_regs, 0, 0);

> +                        tcg_out_ld(s, ts->type, reg,

> +                                   ts->mem_base->reg, ts->mem_offset);

>                      }

>                  }

>              } else {

> 


Acked-by: David Hildenbrand <david@redhat.com>


-- 

Thanks,

David / dhildenb

Patch

diff --git a/tcg/tcg.c b/tcg/tcg.c
index b083faacd2..d3dcfe3dca 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3373,7 +3373,18 @@  static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
                                          ots->indirect_base);
             }
             if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) {
-                abort();
+                /* Cross register class move not supported.
+                   Store the source register into the destination slot
+                   and leave the destination temp as TEMP_VAL_MEM.  */
+                assert(!ots->fixed_reg);
+                if (!ts->mem_allocated) {
+                    temp_allocate_frame(s, ots);
+                }
+                tcg_out_st(s, ts->type, ts->reg,
+                           ots->mem_base->reg, ots->mem_offset);
+                ots->mem_coherent = 1;
+                temp_free_or_dead(s, ots, -1);
+                return;
             }
         }
         ots->val_type = TEMP_VAL_REG;
@@ -3475,7 +3486,11 @@  static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
             reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
                                 o_preferred_regs, ts->indirect_base);
             if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
-                abort();
+                /* Cross register class move not supported.  Sync the
+                   temp back to its slot and load from there.  */
+                temp_sync(s, ts, i_allocated_regs, 0, 0);
+                tcg_out_ld(s, ts->type, reg,
+                           ts->mem_base->reg, ts->mem_offset);
             }
         }
         new_args[i] = reg;
@@ -3634,7 +3649,11 @@  static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
                 if (ts->reg != reg) {
                     tcg_reg_free(s, reg, allocated_regs);
                     if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
-                        abort();
+                        /* Cross register class move not supported.  Sync the
+                           temp back to its slot and load from there.  */
+                        temp_sync(s, ts, allocated_regs, 0, 0);
+                        tcg_out_ld(s, ts->type, reg,
+                                   ts->mem_base->reg, ts->mem_offset);
                     }
                 }
             } else {