From patchwork Tue May 21 15:45:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 164738 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1768974ili; Tue, 21 May 2019 08:47:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqyF1iCL3NT2BJAismnXmRmWXA5oe6bYmvW+yktTgq+efakWElv4aLrZHfM7M7/iW8Uw7iJ4 X-Received: by 2002:aa7:881a:: with SMTP id c26mr81789118pfo.254.1558453642871; Tue, 21 May 2019 08:47:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558453642; cv=none; d=google.com; s=arc-20160816; b=yU4H3+c2es7TADp/IZ5Oru6oS9ZTVmOYyKwhQtqzk5kGTldZDdZgdwAsiCc0qGio3s CPHdhHxhXcDiB41JOzX/IKwguu8zE0b783jLb5rqrKyJmdkYhXAs1Umkfid3eYcDrs4n kHnryZhfJ6WNxKDzO5JCqY2HuERnLa1EM5chAWwMLPim9eHDHDc58puOzSMpRDfbvGqv cUkWkdyLA8UUsntW20jQiKWfBybijVJgGsjRlrqiuOnUdhac75T5D1nZc4kz1FuKhhnd 4IKWpnY53zojObqCjEbeGfdob5GMI2q1I1cYM9N0KawZxTRLYyfWDq7kXonrMF3nEJSl 8Fzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=qEx6uDe0U5ghEnBHm99gzwaV8EBDYsz7AHTItZcDFEI=; b=S7yhaDicDoxo8txjw0r/mE+i4FBZyitHAyB0ro8Wh9KbVKSyNeMI3XOu0h/5qM973K a1hUvohZwOnu4abV9x98sGktLbcrqBHXZIrr83X3SoDTtxnb8sxNLHwFMocv51P37Prc 8+1cp/0qgyIwjEiKaHWfw1D2noOg8+CyckLnf95Jf7kfbEAWbUOX7XFK1Y3xAug11HJd pO6kCHvcZgNP2t02giwqBDvfkAgtvtpmcQ/eakkFE0oZ7HZhAGKQ28Ijzkr2sFnW8TrD j7m0GpXwJzAgOeXLvBnRs+9dzfWnnDCG9skANaWXuJ99hP1LuBp/f6rcmSuqZ7IDPzva xjKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=OJB0s+yP; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i12si5507406plt.287.2019.05.21.08.47.22; Tue, 21 May 2019 08:47:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=OJB0s+yP; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728316AbfEUPrW (ORCPT + 1 other); Tue, 21 May 2019 11:47:22 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:20680 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728212AbfEUPrW (ORCPT ); Tue, 21 May 2019 11:47:22 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4LFjw7P004981; Tue, 21 May 2019 17:46:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=qEx6uDe0U5ghEnBHm99gzwaV8EBDYsz7AHTItZcDFEI=; b=OJB0s+yPhWGa2riM+WQcEmikoIcHn9qFrpXobf2+XbjfYFTcePdkfELu1iPgLH9ZaEzs Wj2RvfWDFP8rMcXte8Ns5Jv0GhMtKqgikVnvH4BdePxL2yYjjOA5UTmDyXyzQmIOqu5n cZiWR9dFmn/w8u9i0RMDaLX2F5MUhN8b3KUOkottCtIMDUlR9FpTMC0ALxt/DQzXwDZl iS0O48fITRub/fbS772sR29o/SLB4bnGJbE11nYqcfDHXF9UUVMCl3ulC4pVDiEWvetk bGnf0RKE5/HYGWg9abWZEI7g6HXV3NONtyI4/WdJmXBUianUH6t9iEHK4c6N7T2Nir+0 Xw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2sj7tu2h6r-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 21 May 2019 17:46:38 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BEB8D3D; Tue, 21 May 2019 15:46:37 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A9A352CEA; Tue, 21 May 2019 15:46:37 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.46) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 21 May 2019 17:46:37 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 21 May 2019 17:46:36 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" CC: , , , , "Erwan Le Ray" , Fabrice Gasnier Subject: [PATCH 3/7] serial: stm32: fix rx data length when parity enabled Date: Tue, 21 May 2019 17:45:43 +0200 Message-ID: <1558453547-22866-4-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1558453547-22866-1-git-send-email-erwan.leray@st.com> References: <1558453547-22866-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-21_03:, , signatures=0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org - Fixes a rx data error when data length < 8 bits and parity is enabled. RDR register MSB is used for parity bit reception. - Adds a mask to ignore MSB when data is get from RDR. Fixes: 3489187204eb ("serial: stm32: adding dma support") Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index f6b7393..0a7953e 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -194,8 +194,8 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res, return 0; } -static unsigned long -stm32_get_char(struct uart_port *port, u32 *sr, int *last_res) +static unsigned long stm32_get_char(struct uart_port *port, u32 *sr, + int *last_res) { struct stm32_port *stm32_port = to_stm32_port(port); struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; @@ -205,10 +205,13 @@ static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res, c = stm32_port->rx_buf[RX_BUF_L - (*last_res)--]; if ((*last_res) == 0) *last_res = RX_BUF_L; - return c; } else { - return readl_relaxed(port->membase + ofs->rdr); + c = readl_relaxed(port->membase + ofs->rdr); + /* apply RDR data mask */ + c &= stm32_port->rdr_mask; } + + return c; } static void stm32_receive_chars(struct uart_port *port, bool threaded) @@ -679,6 +682,7 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, cr2 |= USART_CR2_STOP_2B; bits = stm32_get_databits(termios); + stm32_port->rdr_mask = (BIT(bits) - 1); if (cflag & PARENB) { bits++; diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index 8d34802..30d2433 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -254,6 +254,7 @@ struct stm32_port { bool hw_flow_control; bool fifoen; int wakeirq; + int rdr_mask; /* receive data register mask */ }; static struct stm32_port stm32_ports[STM32_MAX_PORTS];