@@ -35,6 +35,15 @@
: "=r" (reg)); \
reg; \
})
+#define read_sysreg_elx_s(r,nvh,vh) \
+ ({ \
+ u64 reg; \
+ asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
+ __mrs_s("%0", r##vh), \
+ ARM64_HAS_VIRT_HOST_EXTN) \
+ : "=r" (reg)); \
+ reg; \
+ })
#define write_sysreg_elx(v,r,nvh,vh) \
do { \
@@ -44,6 +53,14 @@
ARM64_HAS_VIRT_HOST_EXTN) \
: : "rZ" (__val)); \
} while (0)
+#define write_sysreg_elx_s(v,r,nvh,vh) \
+ do { \
+ u64 __val = (u64)(v); \
+ asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
+ __msr_s(r##vh, "%x0"), \
+ ARM64_HAS_VIRT_HOST_EXTN) \
+ : : "rZ" (__val)); \
+ } while (0)
/*
* Unified accessors for registers that have a different encoding
@@ -72,7 +89,9 @@
#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
+#define read_sysreg_el1_s(r) read_sysreg_elx_s(r, _EL1, _EL12)
#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
+#define write_sysreg_el1_s(v,r) write_sysreg_elx_s(v, r, _EL1, _EL12)
/* The VHE specific system registers and their encoding */
#define sctlr_EL12 sys_reg(3, 5, 1, 0, 0)
KVM provides {read,write}_sysreg_el1() to write to ${REG}_EL1 when we really want to read/write to the EL1 register without any VHE register redirection. SPE registers are not supported by many versions of GAS. For this reason we mostly use mrs_s macro which takes sys_reg() representation. However these SPE registers using sys_reg representation doesn't work well with existing {read,write}_sysreg_el1 macros. We need to add {read,write}_sysreg_el1_s versions so cope up with them. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> --- arch/arm64/include/asm/kvm_hyp.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.17.1