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Miller" , Santosh Shilimkar , Richard Cochran , Rob Herring CC: Sekhar Nori , Murali Karicheri , Wingman Kwok , , , , , Grygorii Strashko Subject: [PATCH net-next 09/10] ARM: dts: k2l-netcp: add cpts refclk_mux node Date: Sat, 1 Jun 2019 13:45:33 +0300 Message-ID: <20190601104534.25790-10-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190601104534.25790-1-grygorii.strashko@ti.com> References: <20190601104534.25790-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org KeyStone 66AK2L 1G Ethernet Switch Subsystems, can control an external multiplexer that selects one of up to 32 clocks for time sync reference (RFTCLK) clock. This feature can be configured through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module and modelled as multiplexer clock. Hence, add cpts-refclk-mux clock node which allows to mux one of SYSCLK2, SYSCLK3, TIMI0, TIMI1, TSREFCLK clocks as CPTS reference clock [1] and group all CPTS properties under "cpts" subnode. [1] http://www.ti.com/lit/gpn/66ak2l06 Signed-off-by: Grygorii Strashko --- arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi index a2e47bad3307..c1f982604145 100644 --- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi @@ -134,8 +134,8 @@ netcp: netcp@26000000 { /* NetCP address range */ ranges = <0 0x26000000 0x1000000>; - clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>; - clock-names = "pa_clk", "ethss_clk", "cpts"; + clocks = <&clkpa>, <&clkcpgmac>; + clock-names = "pa_clk", "ethss_clk"; dma-coherent; ti,navigator-dmas = <&dma_gbe 0>, @@ -155,6 +155,22 @@ netcp: netcp@26000000 { tx-queue = <896>; tx-channel = "nettx"; + cpts { + clocks = <&cpts_refclk_mux>; + clock-names = "cpts"; + + cpts_refclk_mux: cpts-refclk-mux { + #clock-cells = <0>; + clocks = <&chipclk12>, <&chipclk13>, + <&timi0>, <&timi1>, + <&tsrefclk>; + ti,mux-tbl = <0x0>, <0x1>, <0x2>, + <0x3>, <0x8>; + assigned-clocks = <&cpts_refclk_mux>; + assigned-clock-parents = <&chipclk12>; + }; + }; + interfaces { gbe0: interface-0 { slave-port = <0>;