From patchwork Mon Jun 10 17:10:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166340 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1272238ilk; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqwek94Iw9zA2j2STxXRJFZ59MZT/Pgu9rB4oLeAWl/KKZ3mBc53Yy0trkh1IFMRfwy6Z9X+ X-Received: by 2002:a17:902:246:: with SMTP id 64mr1369820plc.311.1560186712428; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186712; cv=none; d=google.com; s=arc-20160816; b=s1jreap1YeqO/jAtF663xxzU2grzudMjr4prKOU7J8m5cMfT1gbSh+qu+pcn6U1vxZ YBL8OwIsjoxb2/D7FimABYJfcivXF+1+J0INmqzo1BIgu4R+8V7HKECSYiScdzk5JBub ag7cS3AxIldoPJ4yFXDX2rmODYvtosDcit+GFG0zrhrrOpbxbXhBdBdJJwGt6tHAx2q8 Z+2OUjQX+4DpxCWJAB3zMU4B2CCSDifRZ4CbiG3lZiHRI+qzyuGKJLsOXtKrP90ZTI0E zNXiBoDKjWzUUtyM2nAP0qTd6/S8hZwO8Q966JCCRi/YSsS3dvSkxDw6lOG2Q2fvm6r7 Nw1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=z3YzyKVQTJo6QkBGPqZ9gkEZ1EkFSdA9cg7U4o7oZDU=; b=B84OyTYgXuUVlrRDbMaH8kTXc5pf8O/kLcbUq4GvPfmWFOXvndeU/PoDWZM9+M4d0z g8TloouH5/ondC255vBc17VUcFBEkXKl4x5MVHFEbpD0AAsnnQJdE0oI/lnqB4RtYWnM rfCu3xWgJQLOwf5+l+gt/ZaegiwbWOv5qJgWpFKMwQHQaCngxf7q5qbPz1sHD5bIG5iP noQYtx5WIR8zAnIPRkSF6WadkaIBU3LpwqSIqhcxlVF2Cirk9ywGDuafhkeac5oN6h6s 8vLEvO6gIV8wM5s43mHY88FMjrxsb5eOm45qEk12icT9bhNavdiJok0nB2k1cYGfLXA2 8vuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tIRRSyB4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r185si9932792pgr.10.2019.06.10.10.11.52; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tIRRSyB4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388032AbfFJRLv (ORCPT + 5 others); Mon, 10 Jun 2019 13:11:51 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47298 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387415AbfFJRLv (ORCPT ); Mon, 10 Jun 2019 13:11:51 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBjwX069101; Mon, 10 Jun 2019 12:11:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186705; bh=z3YzyKVQTJo6QkBGPqZ9gkEZ1EkFSdA9cg7U4o7oZDU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tIRRSyB4F2qK2E1Re4wYsQI41LQtOjA3HKf0CQx4HixuRI7QXhmY9U0BtmA5gZ+fb YzMPhSDDBU0qT1I/yF0akCKZGooYQ7MRoXaP1/ik+4Kb+6m61TgUytltea3rDAmeR9 4rKQ9Vx4Od9hTCGSinh4Ze/7nOK3xGpxC4tzIHHI= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHBjrJ079893 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:11:45 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:11:45 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:11:45 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBi5r066791; Mon, 10 Jun 2019 12:11:45 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 05/20] gpio: gpio-omap: remove irq_ack method Date: Mon, 10 Jun 2019 20:10:48 +0300 Message-ID: <20190610171103.30903-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King The irq_ack method does not fit our hardware requirements. Edge interrupts must be cleared before we handle them, and level interrupts must be cleared after handling them. We handle the interrupt clearance in our interrupt handler for edge IRQs and in the unmask method for level IRQs. Replace the irq_ack method with the no-op method from the dummy irq chip. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 01da1c17bb20..04e3da55e39c 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -852,14 +852,6 @@ static void gpio_irq_bus_sync_unlock(struct irq_data *data) pm_runtime_put(bank->chip.parent); } -static void omap_gpio_ack_irq(struct irq_data *d) -{ - struct gpio_bank *bank = omap_irq_data_get_bank(d); - unsigned offset = d->hwirq; - - omap_clear_gpio_irqstatus(bank, offset); -} - static void omap_gpio_mask_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); @@ -1181,11 +1173,8 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) #endif /* MPUIO is a bit different, reading IRQ status clears it */ - if (bank->is_mpuio) { - irqc->irq_ack = dummy_irq_chip.irq_ack; - if (!bank->regs->wkup_en) - irqc->irq_set_wake = NULL; - } + if (bank->is_mpuio && !bank->regs->wkup_en) + irqc->irq_set_wake = NULL; irq = &bank->chip.irq; irq->chip = irqc; @@ -1531,7 +1520,7 @@ static int omap_gpio_probe(struct platform_device *pdev) irqc->irq_startup = omap_gpio_irq_startup, irqc->irq_shutdown = omap_gpio_irq_shutdown, - irqc->irq_ack = omap_gpio_ack_irq, + irqc->irq_ack = dummy_irq_chip.irq_ack, irqc->irq_mask = omap_gpio_mask_irq, irqc->irq_unmask = omap_gpio_unmask_irq, irqc->irq_set_type = omap_gpio_irq_type,