[v2] spi: spi-synquacer: Fixed build on architectures missing readsl/writesl series

Message ID 20190620082426.14530-1-masahisa.kojima@linaro.org
State Accepted
Commit 51c711f2c38a412aaeda43c8167fe41877cf414d
Headers show
Series
  • [v2] spi: spi-synquacer: Fixed build on architectures missing readsl/writesl series
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Commit Message

Masahisa Kojima June 20, 2019, 8:24 a.m.
kbuild test reported that alpha and some of the architectures
are missing readsl/writesl series.
Use more portable ioread32_rep()/iowrite32_rep() series.

Fixes: b0823ee35cf9b ("spi: Add spi driver for Socionext SynQuacer platform")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

---
Changes since v1:
        # Instead of updating Kconfig, use more portable
          ioread32_rep()/iowrite32_rep() series.

 drivers/spi/spi-synquacer.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

-- 
2.14.2

Patch

diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c
index c8c8d9cdd4b3..f99abd85c50a 100644
--- a/drivers/spi/spi-synquacer.c
+++ b/drivers/spi/spi-synquacer.c
@@ -150,14 +150,16 @@  static int read_fifo(struct synquacer_spi *sspi)
 	case 8: {
 		u8 *buf = sspi->rx_buf;
 
-		readsb(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, buf, len);
+		ioread8_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO,
+			    buf, len);
 		sspi->rx_buf = buf + len;
 		break;
 	}
 	case 16: {
 		u16 *buf = sspi->rx_buf;
 
-		readsw(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, buf, len);
+		ioread16_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO,
+			     buf, len);
 		sspi->rx_buf = buf + len;
 		break;
 	}
@@ -166,7 +168,8 @@  static int read_fifo(struct synquacer_spi *sspi)
 	case 32: {
 		u32 *buf = sspi->rx_buf;
 
-		readsl(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, buf, len);
+		ioread32_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO,
+			     buf, len);
 		sspi->rx_buf = buf + len;
 		break;
 	}
@@ -191,14 +194,16 @@  static int write_fifo(struct synquacer_spi *sspi)
 	case 8: {
 		const u8 *buf = sspi->tx_buf;
 
-		writesb(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, buf, len);
+		iowrite8_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO,
+			     buf, len);
 		sspi->tx_buf = buf + len;
 		break;
 	}
 	case 16: {
 		const u16 *buf = sspi->tx_buf;
 
-		writesw(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, buf, len);
+		iowrite16_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO,
+			      buf, len);
 		sspi->tx_buf = buf + len;
 		break;
 	}
@@ -207,7 +212,8 @@  static int write_fifo(struct synquacer_spi *sspi)
 	case 32: {
 		const u32 *buf = sspi->tx_buf;
 
-		writesl(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, buf, len);
+		iowrite32_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO,
+			      buf, len);
 		sspi->tx_buf = buf + len;
 		break;
 	}