From patchwork Wed May 8 09:52:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Capper X-Patchwork-Id: 16787 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qc0-f199.google.com (mail-qc0-f199.google.com [209.85.216.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 34593238FB for ; Wed, 8 May 2013 09:53:43 +0000 (UTC) Received: by mail-qc0-f199.google.com with SMTP id c10sf2005363qcz.6 for ; Wed, 08 May 2013 02:53:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:mime-version:x-beenthere:x-received:received-spf :x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=bj2F2GcWodmWUBM8q3GouqcPw7PCLURwH3FQM02OXOI=; b=n647YXhdD9npDCb/lsW66TKW1WuneF1De44FlvR/HWQQWQyD8vgSJONt+s1uXi3zTx VbiRFnLBz03yksQUJ/bUdDt+qb+sOccKcmr1DDIJUV9nlzpZF3mSvc3mLXjiW3+mXOp/ Jmyu9ThkBBIZJBKqJOLTJ9O8yg52rYWLAf6due95PZ0PSduypib2kv4Q9zFvrCqCsIbs JRIaS+E+t4GgITd7vb4QFrAG/D7Zm9Qa0yMMa2UKzdbSfnjmbG1627aK8DKRHLnvVxxn JZWojCrf27OHPmJqU63vdg+0pcQZbllkZ9Su3x+M8WGeElabdi1IPw+4JQ0Rq/8l6whd 56zA== X-Received: by 10.224.130.195 with SMTP id u3mr7148510qas.1.1368006802425; Wed, 08 May 2013 02:53:22 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.25.162 with SMTP id d2ls807542qeg.24.gmail; Wed, 08 May 2013 02:53:22 -0700 (PDT) X-Received: by 10.52.97.131 with SMTP id ea3mr3318737vdb.71.1368006802254; Wed, 08 May 2013 02:53:22 -0700 (PDT) Received: from mail-vb0-x22a.google.com (mail-vb0-x22a.google.com [2607:f8b0:400c:c02::22a]) by mx.google.com with ESMTPS id p20si14702567veh.12.2013.05.08.02.53.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 May 2013 02:53:22 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c02::22a is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c02::22a; Received: by mail-vb0-f42.google.com with SMTP id w16so1411405vbf.1 for ; Wed, 08 May 2013 02:53:22 -0700 (PDT) X-Received: by 10.52.66.101 with SMTP id e5mr3346098vdt.57.1368006802153; Wed, 08 May 2013 02:53:22 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp146845veb; Wed, 8 May 2013 02:53:21 -0700 (PDT) X-Received: by 10.194.71.103 with SMTP id t7mr9327440wju.38.1368006800938; Wed, 08 May 2013 02:53:20 -0700 (PDT) Received: from mail-wg0-x231.google.com (mail-wg0-x231.google.com [2a00:1450:400c:c00::231]) by mx.google.com with ESMTPS id oz2si3285728wjb.208.2013.05.08.02.53.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 May 2013 02:53:20 -0700 (PDT) Received-SPF: neutral (google.com: 2a00:1450:400c:c00::231 is neither permitted nor denied by best guess record for domain of steve.capper@linaro.org) client-ip=2a00:1450:400c:c00::231; Received: by mail-wg0-f49.google.com with SMTP id j13so1610478wgh.4 for ; Wed, 08 May 2013 02:53:20 -0700 (PDT) X-Received: by 10.180.160.134 with SMTP id xk6mr12645192wib.21.1368006800513; Wed, 08 May 2013 02:53:20 -0700 (PDT) Received: from localhost.localdomain (marmot.wormnet.eu. [188.246.204.87]) by mx.google.com with ESMTPSA id m14sm8068040wij.9.2013.05.08.02.53.19 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 08 May 2013 02:53:19 -0700 (PDT) From: Steve Capper To: linux-mm@kvack.org, x86@kernel.org, linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michal Hocko , Ken Chen , Mel Gorman , Catalin Marinas , Will Deacon , patches@linaro.org, Steve Capper Subject: [RFC PATCH v2 08/11] ARM64: mm: Swap PTE_FILE and PTE_PROT_NONE bits. Date: Wed, 8 May 2013 10:52:40 +0100 Message-Id: <1368006763-30774-9-git-send-email-steve.capper@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1368006763-30774-1-git-send-email-steve.capper@linaro.org> References: <1368006763-30774-1-git-send-email-steve.capper@linaro.org> X-Gm-Message-State: ALoCoQkCPJSiN4SSPk0Xdoe6pCyrjzKifQv47OuvE4xA0jWOZlzSBqbxwi4SAGJmr4N3i9/jTR9X X-Original-Sender: steve.capper@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::22a is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Under ARM64, PTEs can be broadly categorised as follows: - Present and valid: Bit #0 is set. The PTE is valid and memory access to the region may fault. - Present and invalid: Bit #0 is clear and bit #1 is set. Represents present memory with PROT_NONE protection. The PTE is an invalid entry, and the user fault handler will raise a SIGSEGV. - Not present (file): Bits #0 and #1 are clear, bit #2 is set. Memory represented has been paged out. The PTE is an invalid entry, and the fault handler will try and re-populate the memory where necessary. Huge PTEs are block descriptors that have bit #1 clear. If we wish to represent PROT_NONE huge PTEs we then run into a problem as there is no way to distinguish between regular and huge PTEs if we set bit #1. As huge PTEs are always present, the meaning of bits #1 and #2 can be swapped for invalid PTEs. This patch swaps the PTE_FILE and PTE_PROT_NONE constants, allowing us to represent PROT_NONE huge PTEs. Signed-off-by: Steve Capper Acked-by: Catalin Marinas --- arch/arm64/include/asm/pgtable.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index b1a1b59..e245260 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -25,8 +25,8 @@ * Software defined PTE bits definition. */ #define PTE_VALID (_AT(pteval_t, 1) << 0) -#define PTE_PROT_NONE (_AT(pteval_t, 1) << 1) /* only when !PTE_VALID */ -#define PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !pte_present() */ +#define PTE_FILE (_AT(pteval_t, 1) << 1) /* only when !pte_present() */ +#define PTE_PROT_NONE (_AT(pteval_t, 1) << 2) /* only when !PTE_VALID */ #define PTE_DIRTY (_AT(pteval_t, 1) << 55) #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) @@ -306,8 +306,8 @@ extern pgd_t idmap_pg_dir[PTRS_PER_PGD]; /* * Encode and decode a file entry: - * bits 0-1: present (must be zero) - * bit 2: PTE_FILE + * bits 0 & 2: present (must be zero) + * bit 1: PTE_FILE * bits 3-63: file offset / PAGE_SIZE */ #define pte_file(pte) (pte_val(pte) & PTE_FILE)