From patchwork Mon Jul 8 10:45:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 168613 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp6983124ilk; Mon, 8 Jul 2019 03:45:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwCse7TcyZIoq9SwIO1rCwSPwz83J8C/nwvvfZtwfn56W+Ti79s6pm5kwDqfKrbbevQSZyp X-Received: by 2002:a63:1658:: with SMTP id 24mr23341494pgw.167.1562582746521; Mon, 08 Jul 2019 03:45:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562582746; cv=none; d=google.com; s=arc-20160816; b=xvZM64QLtrgGEGvPEzGfiBkGagPXnomOdVEwjHboD5r6gk/SiegQn3opE9rqqcTiRw p/CSkEeqJbNwMAYQWf6+7pqNq2o29O9oLyf02tdDdBjqLfVOoUpiYqLSdfOcpSM/FEZH hwRiSmSTTmPOXwSVpyh8Assz1/2hysReJES2p1y3DG9xKWlvGTpqGHqMg+biSZxOQzcM wIO0dxRKZ0J2YgVjiejXP83NNP+tH4mNc6+g9xU1fr7nC5vtOq+rPHmh2kwj63W3Z2SB qKm40VyVj3dSA+HNO2aLgoZRJJeYavXhnBJHXOtah+CliEE/ThZLYxqTu+z7XBcNR7cz Iz2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:delivered-to; bh=ErN2nu3P+DXVHkLBVieyQiDBxjcQoIOCOr8ExerI6oc=; b=SCxiLRYUXOLY/CpZiyOme8BoN9ZNUzjfbaVojNUyJlhdtUmQsWUyp2kY1reUfJ3Tyq xo2iaXLsL2Biq7SI2GbaiF4bGPg/qu0t8sGHo8YSB/XlsStnttSQzviazz+lDvyxx1AU 6Q6eaWh0tPh0bDAuw3sp8KWwiMYc5mDq88PBo6DVD+MTN4ltnlX4dsGsS+hj7mJv/B90 cgGzu1fYbPfKERjxP6SNGtQFEyMfz8aMAtzAxAEnzGx/4OAQdw1NU5tQ0n4vU/re47Qc fj8PWzA7dYWCIktlcuEKhwiTcLJk+ChKVPWZ2vojDfLWN58Ws6LlabJhjsqqjQJv1hxn KomA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id 132si18888174pgc.134.2019.07.08.03.45.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 08 Jul 2019 03:45:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 962CC89C93; Mon, 8 Jul 2019 10:45:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by gabe.freedesktop.org (Postfix) with ESMTPS id 528F789C82 for ; Mon, 8 Jul 2019 10:45:39 +0000 (UTC) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x68AjbNt045641; Mon, 8 Jul 2019 05:45:37 -0500 Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x68AjbTA089738 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 8 Jul 2019 05:45:37 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 8 Jul 2019 05:45:37 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 8 Jul 2019 05:45:37 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x68AjaQ7094941; Mon, 8 Jul 2019 05:45:36 -0500 From: Jean-Jacques Hiblot To: , , , Subject: [PATCH v2 8/8] drm/omap: add OMAP_BO flags to affect buffer allocation Date: Mon, 8 Jul 2019 12:45:20 +0200 Message-ID: <20190708104520.24217-9-jjhiblot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190708104520.24217-1-jjhiblot@ti.com> References: <20190708104520.24217-1-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1562582737; bh=OORlREukRNbyeTO0NT2qFZJ6srIhNzTArbQ7l5ZZpKQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=j88mZJ+RIS6scX9SfozFhlFCrMe51zp/cm7xBe3BAD2KFz0iqYTifXpYpX5cFc1Uc YLoAXKDIzZn04eDPjiuLRYBM2sxNY90Uf3d3HZfAiEIjxQ9C0tg/UfMTFWCkEPGBgC a32WQVVrWKsEgV4ntPfFfo4KX08rEXI+fWA13hrI= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jsarha@ti.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Tomi Valkeinen On SoCs with DMM/TILER, we have two ways to allocate buffers: normal dma_alloc or via DMM (which basically functions as an IOMMU). DMM can map 128MB at a time, and we only map the DMM buffers when they are used (i.e. not at alloc time). If DMM is present, omapdrm always uses DMM. There are use cases that require lots of big buffers that are being used at the same time by different IPs. At the moment the userspace has a hard maximum of 128MB. This patch adds three new flags that can be used by the userspace to solve the situation: OMAP_BO_MEM_CONTIG: The driver will use dma_alloc to get the memory. This can be used to avoid DMM if the userspace knows it needs more than 128M of memory at the same time. OMAP_BO_MEM_DMM: The driver will use DMM to get the memory. There's not much use for this flag at the moment, as on platforms with DMM it is used by default, but it's here for completeness. OMAP_BO_MEM_PIN: The driver will pin the memory at alloc time, and keep it pinned. This can be used to 1) get an error at alloc time if DMM space is full, and 2) get rid of the constant pin/unpin operations which may have some effect on performance. If none of the flags are given, the behavior is the same as currently. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/omap_gem.c | 25 ++++++++++++++++++++++++- include/uapi/drm/omap_drm.h | 9 +++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c index cafa9d0bf3c1..d744d27e200a 100644 --- a/drivers/gpu/drm/omapdrm/omap_gem.c +++ b/drivers/gpu/drm/omapdrm/omap_gem.c @@ -1095,6 +1095,9 @@ void omap_gem_free_object(struct drm_gem_object *obj) list_del(&omap_obj->mm_list); mutex_unlock(&priv->list_lock); + if (omap_obj->flags & OMAP_BO_MEM_PIN) + omap_gem_unpin_locked(obj); + /* * We own the sole reference to the object at this point, but to keep * lockdep happy, we must still take the omap_obj_lock to call @@ -1145,10 +1148,19 @@ static bool omap_gem_validate_flags(struct drm_device *dev, u32 flags) return false; } + if ((flags & OMAP_BO_MEM_CONTIG) && (flags & OMAP_BO_MEM_DMM)) + return false; + + if ((flags & OMAP_BO_MEM_DMM) && !priv->usergart) + return false; + if (flags & OMAP_BO_TILED_MASK) { if (!priv->usergart) return false; + if (flags & OMAP_BO_MEM_CONTIG) + return false; + switch (flags & OMAP_BO_TILED_MASK) { case OMAP_BO_TILED_8: case OMAP_BO_TILED_16: @@ -1191,7 +1203,8 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev, */ flags &= ~(OMAP_BO_CACHED|OMAP_BO_WC|OMAP_BO_UNCACHED); flags |= tiler_get_cpu_cache_flags(); - } else if ((flags & OMAP_BO_SCANOUT) && !priv->has_dmm) { + } else if ((flags & OMAP_BO_MEM_CONTIG) || + ((flags & OMAP_BO_SCANOUT) && !priv->has_dmm)) { /* * If we don't have DMM, we must allocate scanout buffers * from contiguous DMA memory. @@ -1251,12 +1264,22 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev, goto err_release; } + if (flags & OMAP_BO_MEM_PIN) { + ret = omap_gem_pin(obj, NULL); + if (ret) + goto err_free_dma; + } + mutex_lock(&priv->list_lock); list_add(&omap_obj->mm_list, &priv->obj_list); mutex_unlock(&priv->list_lock); return obj; +err_free_dma: + if (flags & OMAP_BO_MEM_DMA_API) + dma_free_writecombine(dev->dev, size, + omap_obj->vaddr, omap_obj->dma_addr); err_release: drm_gem_object_release(obj); err_free: diff --git a/include/uapi/drm/omap_drm.h b/include/uapi/drm/omap_drm.h index 5a142fad473c..842d3180a442 100644 --- a/include/uapi/drm/omap_drm.h +++ b/include/uapi/drm/omap_drm.h @@ -47,6 +47,15 @@ struct drm_omap_param { #define OMAP_BO_UNCACHED 0x00000004 #define OMAP_BO_CACHE_MASK 0x00000006 +/* Force allocation from contiguous DMA memory */ +#define OMAP_BO_MEM_CONTIG 0x00000008 + +/* Force allocation via DMM */ +#define OMAP_BO_MEM_DMM 0x00000010 + +/* Pin the buffer when allocating and keep pinned */ +#define OMAP_BO_MEM_PIN 0x00000020 + /* Use TILER for the buffer. The TILER container unit can be 8, 16 or 32 bits. */ #define OMAP_BO_TILED_8 0x00000100 #define OMAP_BO_TILED_16 0x00000200