[4/5] pinctrl: uniphier: Add Pro5 PCIe pin-mux settings

Message ID 1562668156-12927-5-git-send-email-hayashi.kunihiko@socionext.com
State New
Headers show
Series
  • pinctrl: uniphier: Add some improvements and new settings
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Commit Message

Kunihiko Hayashi July 9, 2019, 10:29 a.m.
Pro5 PCIe interface uses the following pins:
    XPERST, XPEWAKE, XPECLKRQ

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

---
 drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.7.4

Comments

Masahiro Yamada July 29, 2019, 1:46 p.m. | #1
On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>

> Pro5 PCIe interface uses the following pins:

>     XPERST, XPEWAKE, XPECLKRQ

>

> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> ---

>  drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 5 +++++

>  1 file changed, 5 insertions(+)

>

> diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> index 1d418e3..577f12e 100644

> --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> @@ -855,6 +855,8 @@ static const unsigned usb1_pins[] = {126, 127};

>  static const int usb1_muxvals[] = {0, 0};

>  static const unsigned usb2_pins[] = {128, 129};

>  static const int usb2_muxvals[] = {0, 0};

> +static const unsigned pcie_pins[] = {109, 110, 111};

> +static const int pcie_muxvals[] = {0, 0, 0};


Please keep the alphabetical sorting.


>  static const unsigned int gpio_range_pins[] = {

>         89, 90, 91, 92, 93, 94, 95, 96,         /* PORT0x */

>         97, 98, 99, 100, 101, 102, 103, 104,    /* PORT1x */

> @@ -925,6 +927,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {

>         UNIPHIER_PINCTRL_GROUP(usb0),

>         UNIPHIER_PINCTRL_GROUP(usb1),

>         UNIPHIER_PINCTRL_GROUP(usb2),

> +       UNIPHIER_PINCTRL_GROUP(pcie),


Ditto.

>         UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range),

>  };

>

> @@ -957,6 +960,7 @@ static const char * const uart3_groups[] = {"uart3"};

>  static const char * const usb0_groups[] = {"usb0"};

>  static const char * const usb1_groups[] = {"usb1"};

>  static const char * const usb2_groups[] = {"usb2"};

> +static const char * const pcie_groups[] = {"pcie"};

>

>  static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {

>         UNIPHIER_PINMUX_FUNCTION(emmc),

> @@ -979,6 +983,7 @@ static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {

>         UNIPHIER_PINMUX_FUNCTION(usb0),

>         UNIPHIER_PINMUX_FUNCTION(usb1),

>         UNIPHIER_PINMUX_FUNCTION(usb2),

> +       UNIPHIER_PINMUX_FUNCTION(pcie),


Ditto.



>  };

>

>  static int uniphier_pro5_get_gpio_muxval(unsigned int pin,

> --

> 2.7.4

>



--
Best Regards
Masahiro Yamada
Kunihiko Hayashi July 30, 2019, 2:22 a.m. | #2
Hello,

On Mon, 29 Jul 2019 22:46:02 +0900 <yamada.masahiro@socionext.com> wrote:

> On Tue, Jul 9, 2019 at 7:29 PM Kunihiko Hayashi

> <hayashi.kunihiko@socionext.com> wrote:

> >

> > Pro5 PCIe interface uses the following pins:

> >     XPERST, XPEWAKE, XPECLKRQ

> >

> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

> > ---

> >  drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 5 +++++

> >  1 file changed, 5 insertions(+)

> >

> > diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> > index 1d418e3..577f12e 100644

> > --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> > +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c

> > @@ -855,6 +855,8 @@ static const unsigned usb1_pins[] = {126, 127};

> >  static const int usb1_muxvals[] = {0, 0};

> >  static const unsigned usb2_pins[] = {128, 129};

> >  static const int usb2_muxvals[] = {0, 0};

> > +static const unsigned pcie_pins[] = {109, 110, 111};

> > +static const int pcie_muxvals[] = {0, 0, 0};

> 

> Please keep the alphabetical sorting.


I made mistake in adding it.
Okay, I'll sort it including below in v2.

> >  static const unsigned int gpio_range_pins[] = {

> >         89, 90, 91, 92, 93, 94, 95, 96,         /* PORT0x */

> >         97, 98, 99, 100, 101, 102, 103, 104,    /* PORT1x */

> > @@ -925,6 +927,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {

> >         UNIPHIER_PINCTRL_GROUP(usb0),

> >         UNIPHIER_PINCTRL_GROUP(usb1),

> >         UNIPHIER_PINCTRL_GROUP(usb2),

> > +       UNIPHIER_PINCTRL_GROUP(pcie),

> 

> Ditto.

> 

> >         UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range),

> >  };

> >

> > @@ -957,6 +960,7 @@ static const char * const uart3_groups[] = {"uart3"};

> >  static const char * const usb0_groups[] = {"usb0"};

> >  static const char * const usb1_groups[] = {"usb1"};

> >  static const char * const usb2_groups[] = {"usb2"};

> > +static const char * const pcie_groups[] = {"pcie"};

> >

> >  static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {

> >         UNIPHIER_PINMUX_FUNCTION(emmc),

> > @@ -979,6 +983,7 @@ static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {

> >         UNIPHIER_PINMUX_FUNCTION(usb0),

> >         UNIPHIER_PINMUX_FUNCTION(usb1),

> >         UNIPHIER_PINMUX_FUNCTION(usb2),

> > +       UNIPHIER_PINMUX_FUNCTION(pcie),

> 

> Ditto.

> 

> 

> 

> >  };

> >

> >  static int uniphier_pro5_get_gpio_muxval(unsigned int pin,

> > --

> > 2.7.4

> >

> 

> 

> --

> Best Regards

> Masahiro Yamada


---
Best Regards,
Kunihiko Hayashi

Patch

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
index 1d418e3..577f12e 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
@@ -855,6 +855,8 @@  static const unsigned usb1_pins[] = {126, 127};
 static const int usb1_muxvals[] = {0, 0};
 static const unsigned usb2_pins[] = {128, 129};
 static const int usb2_muxvals[] = {0, 0};
+static const unsigned pcie_pins[] = {109, 110, 111};
+static const int pcie_muxvals[] = {0, 0, 0};
 static const unsigned int gpio_range_pins[] = {
 	89, 90, 91, 92, 93, 94, 95, 96,		/* PORT0x */
 	97, 98, 99, 100, 101, 102, 103, 104,	/* PORT1x */
@@ -925,6 +927,7 @@  static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {
 	UNIPHIER_PINCTRL_GROUP(usb0),
 	UNIPHIER_PINCTRL_GROUP(usb1),
 	UNIPHIER_PINCTRL_GROUP(usb2),
+	UNIPHIER_PINCTRL_GROUP(pcie),
 	UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range),
 };
 
@@ -957,6 +960,7 @@  static const char * const uart3_groups[] = {"uart3"};
 static const char * const usb0_groups[] = {"usb0"};
 static const char * const usb1_groups[] = {"usb1"};
 static const char * const usb2_groups[] = {"usb2"};
+static const char * const pcie_groups[] = {"pcie"};
 
 static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {
 	UNIPHIER_PINMUX_FUNCTION(emmc),
@@ -979,6 +983,7 @@  static const struct uniphier_pinmux_function uniphier_pro5_functions[] = {
 	UNIPHIER_PINMUX_FUNCTION(usb0),
 	UNIPHIER_PINMUX_FUNCTION(usb1),
 	UNIPHIER_PINMUX_FUNCTION(usb2),
+	UNIPHIER_PINMUX_FUNCTION(pcie),
 };
 
 static int uniphier_pro5_get_gpio_muxval(unsigned int pin,